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authorFelix Held <felix-coreboot@felixheld.de>2020-07-23 19:37:42 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-07-25 17:44:52 +0000
commit1d0154cee023d7185436b9a3399d25276a532699 (patch)
treebc20cb340da13e1691262392ebfb0c3133e9b593 /Documentation/superio
parentc4d4b54314451fa0a4ef63de8533d576d782765b (diff)
soc/amd/picasso: don't apply unconfigured USB2 PHY tune parameters
Since FSP pre-populates the UPD struct with the non-zero default values, coreboot shouldn't set them to zero in the case that they aren't configured in the board's devicetree. Since all parameters being zero is a valid case, this patch adds another devicetree option that applying the devicetree settings for the USB2 PHY tuning depends on being set. BUG=b:161923068 Change-Id: I66e5811ce64298b0644d2881420634a8ce1379d7 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43781 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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