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authorPatrick Rudolph <patrick.rudolph@9elements.com>2021-01-11 08:52:50 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-01-12 13:36:36 +0000
commit6279cabb5b0dc4a67525d61b1292bec40dee5360 (patch)
tree79007c5706feeb823a2066616f3a5e690969c97a /Documentation/soc/intel
parentfc1d50a3651344224b846ac0889e02d9b677d837 (diff)
Documentation: Fix toctree and remove dead links
Change-Id: Ie3c7c33096f60a5aa476ff55c538fe68ffadc068 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49292 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'Documentation/soc/intel')
-rw-r--r--Documentation/soc/intel/icelake/iceLake_coreboot_development.md5
-rw-r--r--Documentation/soc/intel/index.md2
2 files changed, 1 insertions, 6 deletions
diff --git a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
index 5f8e279841..214733140b 100644
--- a/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
+++ b/Documentation/soc/intel/icelake/iceLake_coreboot_development.md
@@ -20,11 +20,6 @@ Like any other Intel SoC, Ice Lake coreboot development is also based on "Intel
:doc:`../../../mainboard/intel/icelake_rvp`
```
-3. OEMs to design based on reference platform and make use of mainboard sample code. Dragonegg is Ice Lake based mainboard developed by Google
- ```eval_rst
- :doc:`../../../mainboard/google/dragonegg`
- ```
-
### Summary:
* SoC is Ice Lake.
* Reference platform is icelake_rvp.
diff --git a/Documentation/soc/intel/index.md b/Documentation/soc/intel/index.md
index 5c7239af6b..71e427ebef 100644
--- a/Documentation/soc/intel/index.md
+++ b/Documentation/soc/intel/index.md
@@ -11,4 +11,4 @@ This section contains documentation about coreboot on specific Intel SOCs.
- [Microcode Updates](microcode.md)
- [Firmware Interface Table](fit.md)
- [Apollolake](apollolake/index.md)
-- [CSE FW Update](cse_fw_update/cse_fw_update_model.md)
+- [CSE FW Update](cse_fw_update/cse_fw_update.md)