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authorShuo Liu <shuo.liu@intel.com>2024-10-22 04:08:11 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-10-23 10:30:26 +0000
commit495b705137b2efe9cb5c304d0471b836aa296c98 (patch)
treed6c18000a37677f2aeddb19d8497d0e95521ae32 /Documentation/soc/intel
parent1c088e6d620e2255d506d718b45afa5d48ecdff5 (diff)
configs/builder: Update PBP path for Gen6 Xeon-SP boards
Gen6 Xeon-SP boards needs to be provided with platform boot policy blob. Change-Id: I22b944ab6bcb2b9d0797833c06410bdc523e2709 Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84820 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'Documentation/soc/intel')
-rw-r--r--Documentation/soc/intel/xeon_sp/community_preview_guide.md1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/soc/intel/xeon_sp/community_preview_guide.md b/Documentation/soc/intel/xeon_sp/community_preview_guide.md
index 6a32b4fd8b..96ff86fc09 100644
--- a/Documentation/soc/intel/xeon_sp/community_preview_guide.md
+++ b/Documentation/soc/intel/xeon_sp/community_preview_guide.md
@@ -140,6 +140,7 @@ https://review.coreboot.org/admin/repos/intel-dev-pub,branches
# https://cdrdv2-public.intel.com/736809/736809_FSP_EAS_v2.4_Errata_A.pdf
CONFIG_IFD_BIN_PATH=<path of intel flash descriptor blob>
+CONFIG_PBP_BIN_PATH=<path of platform boot policy blob>
CONFIG_CPU_UCODE_BINARIES=<path of ucode>
CONFIG_FSP_T_FILE=<path of FSP-T binary>
CONFIG_FSP_M_FILE=<path of FSP-M binary>