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| author | Usha P <usha.p@intel.com> | 2019-07-19 14:29:29 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-07-24 03:05:45 +0000 |
| commit | 46445155ea21b0aa9106e12a00b9b1d89887a461 (patch) | |
| tree | 7f6df5d5c2ae4bcea2bbbf4946db94c30b412a89 /Documentation/releases/coreboot-4.10-relnotes.md | |
| parent | 47a7b37cbf9d8d5181fe72c132728da51f3385cd (diff) | |
soc/intel/common: Set controller state to active in uart init
Set the controller state to D0 during the uart init sequence, this
ensures the controller is up and active.
One more argument struct device *dev has been added
to uart_lpss_init function for the same.
BUG=b:135941367
TEST=Verify no timeouts seen during UART controller enumeration
sequence in CML and ICL platforms.
Signed-off-by: Usha P <usha.p@intel.com>
Change-Id: I0187267670e1dea3e1d5e83d0b29967724d6063e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34447
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/releases/coreboot-4.10-relnotes.md')
0 files changed, 0 insertions, 0 deletions