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authorPhilipp Hug <philipp@hug.cx>2018-12-31 14:13:47 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-26 13:40:51 +0000
commit2ef569a4050c3b0c3c93b3ffb6b4d804b3a7cddf (patch)
treee0f58a47dc23a7ec5e1549148c3b10ea95e2171a /Documentation/mainboard
parent175778f059b21f1bce06e1405647e292b3e8e6d6 (diff)
mb/qemu-riscv: update to match current qemu version
Boots again to payload not found on qemu. Change-Id: Ie107eb882cbaac5a5a06c1ff990e7b9364377640 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/c/30554 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'Documentation/mainboard')
-rw-r--r--Documentation/mainboard/emulation/qemu-riscv.md8
-rw-r--r--Documentation/mainboard/index.md1
2 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/mainboard/emulation/qemu-riscv.md b/Documentation/mainboard/emulation/qemu-riscv.md
new file mode 100644
index 0000000000..3aad816855
--- /dev/null
+++ b/Documentation/mainboard/emulation/qemu-riscv.md
@@ -0,0 +1,8 @@
+# Qemu RISC-V emulator
+
+## Building coreboot and running it in Qemu
+
+- Configure coreboot and run `make` as usual
+- Run `util/riscv/make-spike-elf.sh build/coreboot.rom build/coreboot.elf` to
+ convert coreboot to an ELF that Qemu can load
+- Run `qemu-system-riscv64 -M virt -m 1024M -nographic -kernel build/coreboot.elf`
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
index 93ee828a0a..d8d3b76fde 100644
--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
@@ -19,6 +19,7 @@ This section contains documentation about coreboot on specific mainboards.
The boards in this section are not real mainboards, but emulators.
- [Spike RISC-V emulator](emulation/spike-riscv.md)
+- [Qemu RISC-V emulator](emulation/qemu-riscv.md)
## Intel