diff options
author | Frans Hendriks <fhendriks@eltan.com> | 2019-11-14 12:57:26 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-15 10:57:07 +0000 |
commit | 0a8e8e84f1cba64784fd9f2e7ae95a7121618faa (patch) | |
tree | e94eb16539cb17c02bbcd1d1b6642720af7097db /Documentation/mainboard | |
parent | 700c024057321792991f984d603aaecec2c813b0 (diff) |
Documentation/mb/facebook/fbg1701.md: Update microcode blob
The microcode is available in 3rdparty microcode now.
This ucode can be used.
BUG=N/A
TEST=build
Change-Id: I52a04c7dc97608f868ee0b415bbbb328937f18f7
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36855
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'Documentation/mainboard')
-rw-r--r--[-rwxr-xr-x] | Documentation/mainboard/facebook/fbg1701.md | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/Documentation/mainboard/facebook/fbg1701.md b/Documentation/mainboard/facebook/fbg1701.md index e59627721a..06bf42fc98 100755..100644 --- a/Documentation/mainboard/facebook/fbg1701.md +++ b/Documentation/mainboard/facebook/fbg1701.md @@ -14,8 +14,7 @@ Mainboard menu. This board currently requires: fsp blob 3rdparty/fsp/BraswellFspBinPkg/FspBin/BSWFSP.fd -Microcode Intel Braswell cpuid 1046C4 version 410 - (Used pre-built binary retrieved from Intel site) +Microcode 3rdparty/intel-microcode/intel-ucode/06-4c-04 ## Flashing coreboot |