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authorMartin Roth <martin@coreboot.org>2021-10-01 14:10:19 -0600
committerMartin Roth <martinroth@google.com>2021-10-05 18:06:24 +0000
commit6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9 (patch)
tree23a804c556938f20002a2727ac62495a9bb982fe /Documentation/mainboard/up
parentd4c55353e044e157994eaf15b78103a9473e5440 (diff)
Documentation: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/up')
-rw-r--r--Documentation/mainboard/up/squared/index.md6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/mainboard/up/squared/index.md b/Documentation/mainboard/up/squared/index.md
index d07f1118a8..2895e1f6a0 100644
--- a/Documentation/mainboard/up/squared/index.md
+++ b/Documentation/mainboard/up/squared/index.md
@@ -48,7 +48,7 @@
+---------------------+------------+
| Internal flashing | No |
+---------------------+------------+
-| In curcuit flashing | Yes |
+| In circuit flashing | Yes |
+---------------------+------------+
```
@@ -67,8 +67,8 @@ The GPIO header is located on the **bottom** side (see [here][overview_bottom_li
The SPI header is located on the **bottom** side (see [here][overview_bottom_link]).
![][header_cn22]
-### Preperations
-In order to build coreboot, it's neccessary to extract some files from the vendor firmware. Make sure that you have a fully working dump.
+### Preparations
+In order to build coreboot, it's necessary to extract some files from the vendor firmware. Make sure that you have a fully working dump.
```bash
[upsquared]$ ls
firmware_vendor.rom