diff options
author | Nicholas Chin <nic.c3.14@gmail.com> | 2023-02-21 19:41:06 -0700 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2024-03-21 16:11:56 +0000 |
commit | 35599f9a6671779a377443ae6e596367a7613e22 (patch) | |
tree | c765d9b3404c7d1b3d72c780f62f7ff3e18adbad /Documentation/mainboard/supermicro | |
parent | 9203e25a3539a3a1e55ea12b3bfa4d15f0aa0304 (diff) |
Docs: Replace Recommonmark with MyST Parser
Recommonmark has been deprecated since 2021 [1] and the last release was
over 3 years ago [2]. As per their announcement, Markedly Structured
Text (MyST) Parser [3] is the recommended replacement.
For the most part, the existing documentation is compatible with MyST,
as both parsers are built around the CommonMark flavor of Markdown. The
main difference that affects coreboot is how the Sphinx toctree is
generated. Recommonmark has a feature called auto_toc_tree, which
converts single level lists of references into a toctree:
* [Part 1: Starting from scratch](part1.md)
* [Part 2: Submitting a patch to coreboot.org](part2.md)
* [Part 3: Writing unit tests](part3.md)
* [Managing local additions](managing_local_additions.md)
* [Flashing firmware](flashing_firmware/index.md)
MyST Parser does not provide a replacement for this feature, meaning the
toctree must be defined manually. This is done using MyST's syntax for
Sphinx directives:
```{toctree}
:maxdepth: 1
Part 1: Starting from scratch <part1.md>
Part 2: Submitting a patch to coreboot.org <part2.md>
Part 3: Writing unit tests <part3.md>
Managing local additions <managing_local_additions.md>
Flashing firmware <flashing_firmware/index.md>
```
Internally, auto_toc_tree essentially converts lists of references into
the Sphinx toctree structure that the MyST syntax above more directly
represents.
The toctrees were converted to the MyST syntax using the following
command and Python script:
`find ./ -iname "*.md" | xargs -n 1 python conv_toctree.py`
```
import re
import sys
in_list = False
f = open(sys.argv[1])
lines = f.readlines()
f.close()
with open(sys.argv[1], "w") as f:
for line in lines:
match = re.match(r"^[-*+] \[(.*)\]\((.*)\)$", line)
if match is not None:
if not in_list:
in_list = True
f.write("```{toctree}\n")
f.write(":maxdepth: 1\n\n")
f.write(match.group(1) + " <" + match.group(2) + ">\n")
else:
if in_list:
f.write("```\n")
f.write(line)
in_list = False
if in_list:
f.write("```\n")
```
While this does add a little more work for creating the toctree, this
does give more control over exactly what goes into the toctree. For
instance, lists of links to external resources currently end up in the
toctree, but we may want to limit it to pages within coreboot.
This change does break rendering and navigation of the documentation in
applications that can render Markdown, such as Okular, Gitiles, or the
GitHub mirror. Assuming the docs are mainly intended to be viewed after
being rendered to doc.coreboot.org, this is probably not an issue in
practice.
Another difference is that MyST natively supports Markdown tables,
whereas with Recommonmark, tables had to be written in embedded rST [4].
However, MyST also supports embedded rST, so the existing tables can be
easily converted as the syntax is nearly identical.
These were converted using
`find ./ -iname "*.md" | xargs -n 1 sed -i "s/eval_rst/{eval-rst}/"`
Makefile.sphinx and conf.py were regenerated from scratch by running
`sphinx-quickstart` using the updated version of Sphinx, which removes a
lot of old commented out boilerplate. Any relevant changes coreboot had
made on top of the previous autogenerated versions of these files were
ported over to the newly generated file.
From some initial testing the generated webpages appear and function
identically to the existing documentation built with Recommonmark.
TEST: `make -C util/docker docker-build-docs` builds the documentation
successfully and the generated output renders properly when viewed in
a web browser.
[1] https://github.com/readthedocs/recommonmark/issues/221
[2] https://pypi.org/project/recommonmark/
[3] https://myst-parser.readthedocs.io/en/latest/
[4] https://doc.coreboot.org/getting_started/writing_documentation.html
Change-Id: I0837c1722fa56d25c9441ea218e943d8f3d9b804
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73158
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/supermicro')
7 files changed, 21 insertions, 17 deletions
diff --git a/Documentation/mainboard/supermicro/x10slm-f.md b/Documentation/mainboard/supermicro/x10slm-f.md index 97c78d6c3b..70e6e0ac14 100644 --- a/Documentation/mainboard/supermicro/x10slm-f.md +++ b/Documentation/mainboard/supermicro/x10slm-f.md @@ -4,13 +4,13 @@ This section details how to run coreboot on the [Supermicro X10SLM+-F]. ## Required proprietary blobs -```eval_rst +```{eval-rst} Please see :doc:`../../northbridge/intel/haswell/mrc.bin`. ``` ## Building coreboot -```eval_rst +```{eval-rst} If you haven't already, build the coreboot toolchain as described in :doc:`../../tutorial/part1`. ``` @@ -40,7 +40,7 @@ Now, run `make` to build the coreboot image. ## Flashing coreboot -```eval_rst +```{eval-rst} In addition to the information here, please see the :doc:`../../tutorial/flashing_firmware/index`. ``` @@ -119,7 +119,7 @@ eventually start. There is no such delay when running coreboot. ## ECC DRAM -```eval_rst +```{eval-rst} ECC DRAM seems to work, but please see :doc:`../../northbridge/intel/haswell/mrc.bin` for caveats. @@ -139,7 +139,7 @@ for caveats. in coreboot. The `coretemp` driver can still be used for accurate CPU temperature readings from an OS, and hence the OS can do fan control. -```eval_rst +```{eval-rst} Please also see :doc:`../../northbridge/intel/haswell/known-issues`. ``` @@ -176,7 +176,7 @@ Please also see :doc:`../../northbridge/intel/haswell/known-issues`. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | :doc:`../../northbridge/intel/haswell/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md index 109885c093..206f7f9d98 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11-lga1151-series.md @@ -6,10 +6,14 @@ Controller etc. ## Supported boards -- [X11SSH-TF](x11ssh-tf/x11ssh-tf.md) -- [X11SSH-F/LN4F](x11ssh-f/x11ssh-f.md) -- [X11SSM-F](x11ssm-f/x11ssm-f.md) -- [X11SSW-F](x11ssw-f/x11ssw-f.md) +```{toctree} +:maxdepth: 1 + +X11SSH-TF <x11ssh-tf/x11ssh-tf.md> +X11SSH-F/LN4F <x11ssh-f/x11ssh-f.md> +X11SSM-F <x11ssm-f/x11ssm-f.md> +X11SSW-F <x11ssw-f/x11ssw-f.md> +``` ## Required proprietary blobs @@ -42,7 +46,7 @@ These issues apply to all boards. Have a look at the board-specific issues, too. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md index 35b552fa53..836c733e8b 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-f/x11ssh-f.md @@ -55,7 +55,7 @@ So the X11SSH-F just doesn't have 2 NICs populated. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md index 1616676453..963cf719ca 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md @@ -35,7 +35,7 @@ See general issue section. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md index 4e42809b43..3625a560c3 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md @@ -46,7 +46,7 @@ To disable the proprietary LAN firmware, the undocumented jumper J6 can be set t ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssw-f/x11ssw-f.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssw-f/x11ssw-f.md index 8164df1b35..5b25643886 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssw-f/x11ssw-f.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssw-f/x11ssw-f.md @@ -31,7 +31,7 @@ Flashing was performed through the BMC web interface, when a valid license was e ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Kaby Lake | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/supermicro/x9sae.md b/Documentation/mainboard/supermicro/x9sae.md index 406785dcf2..df5595012a 100644 --- a/Documentation/mainboard/supermicro/x9sae.md +++ b/Documentation/mainboard/supermicro/x9sae.md @@ -4,7 +4,7 @@ This page describes how to run coreboot on the Supermicro [X9SAE] and [X9SAE-V] ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+----------------+ | Type | Value | +=====================+================+ @@ -81,7 +81,7 @@ seems that it shall not appear on X9SAE even if it is defined. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ |