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| author | Matt DeVillier <matt.devillier@puri.sm> | 2020-12-02 15:35:34 -0600 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-16 06:28:51 +0000 |
| commit | 087c4f2894a7481953127d181d49f99ebaf8af78 (patch) | |
| tree | cbe8e5cbffdfff40d97b96661a73d9e90e9496dd /Documentation/mainboard/portwell | |
| parent | c1ce6f80c44b19fccf95f6e5a2f0a33d19a41115 (diff) | |
mb/purism/librem_cnl: Use FMAP-based SPD cache
Use a FMAP region to cache SPD data, providing improvements in boot
time and detection of change in DIMM population (which FSP will
sometimes fail to detect / fail to invalidate the MRC cache).
Adapted from implementation used in google/hatch.
Test: build/boot Librem Mini v2, verify SPD cache used, changes
in DIMM population properly detected.
Change-Id: I15cb9aa8b00d39d098a0f901aee026bac1161a80
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48549
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/portwell')
0 files changed, 0 insertions, 0 deletions