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author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:10:19 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:24 +0000 |
commit | 6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9 (patch) | |
tree | 23a804c556938f20002a2727ac62495a9bb982fe /Documentation/mainboard/ocp | |
parent | d4c55353e044e157994eaf15b78103a9473e5440 (diff) |
Documentation: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/ocp')
-rw-r--r-- | Documentation/mainboard/ocp/tiogapass.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/mainboard/ocp/tiogapass.md b/Documentation/mainboard/ocp/tiogapass.md index 6d6afb1920..8c49923791 100644 --- a/Documentation/mainboard/ocp/tiogapass.md +++ b/Documentation/mainboard/ocp/tiogapass.md @@ -51,7 +51,7 @@ To connect to console through SOL (Serial Over Lan): ## Known issues / feature gaps - C6 state is not supported. Workaround is to disable C6 support through - target OS and Linuxboot kernel paramter, such as "cpuidle.off=1". + target OS and Linuxboot kernel parameter, such as "cpuidle.off=1". - SMI handlers are not implemented. - xSDT tables are not fully populated, such as processor/socket devices, PCIe bridge devices. |