diff options
| author | Maximilian Brune <maximilian.brune@9elements.com> | 2024-10-01 12:33:09 +0200 |
|---|---|---|
| committer | Marshall Dawson <marshalldawson3rd@gmail.com> | 2024-10-03 21:07:14 +0000 |
| commit | 3c11347f7c67693c1c464d87e0fbae0396a01cb3 (patch) | |
| tree | b2cc27fbda80fb740e067f4ab11d72f20bfff53e /Documentation/mainboard/msi/ms7707/JSPI1-connected.jpg | |
| parent | f35dfdf0374f76457df0099db142bfc6f8b2c05c (diff) | |
soc/amd/.../amd_pci_int_defs.h: Update according to datasheet
HPET and MISC1/2 and registers are used interchangeably in the
datasheets. Add an alias to emphasise that they refer to the same.
source:
PPR #57396 Rev 3.10 Table "ValidValuesTable: PCI interrupt index list"
PPR #57254 Rev 1.59 Table "ValidValuesTable: PCI interrupt index list"
PPR #57396 Rev 3.10 FCH::IO::IntrMisc1Map and FCH::IO::IntrMisc2Map
PPR #57254 Rev 1.59 FCH::IO::IntrMisc1Map and FCH::IO::IntrMisc2Map
Change-Id: I64f685e507e1cd5ee90e1b18526b9d59ed4c1b34
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84574
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/msi/ms7707/JSPI1-connected.jpg')
0 files changed, 0 insertions, 0 deletions