summaryrefslogtreecommitdiff
path: root/Documentation/mainboard/libretrend
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2020-04-29 09:32:22 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-03 12:20:33 +0000
commita1c767a19b0f617b95306bea4f6cbbd1f9907a6e (patch)
tree3de431e7c33c3442ff28b85cd2b1a3b3af7dd7a1 /Documentation/mainboard/libretrend
parentd8717197ae50dc9f68fbbde2f331d19b1d737351 (diff)
soc/tigerlake: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I1731313798a4aadcbc17808bfe02b50bf8bd41db Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40838 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'Documentation/mainboard/libretrend')
0 files changed, 0 insertions, 0 deletions