diff options
author | Bill XIE <persmule@gmail.com> | 2018-11-29 20:37:35 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-07 11:20:53 +0000 |
commit | 012ef7735d6878ef63aa0315863636bfb88e6c1f (patch) | |
tree | ba849a3d2d6b4ced66bccf34e48e256678265876 /Documentation/mainboard/lenovo/t431s.md | |
parent | d2226060aac315c4420dc57569d90af5b0bf32c0 (diff) |
mainboard/lenovo/t430s: Add ThinkPad T431s as a variant
The code is based on autoport and that for T430s
Tested:
- CPU i5-3337U
- Slotted DIMM 2GiB
- Soldered RAM 4GiB from samsung (There may be more models here)
- Camera
- pci-e and usb2 on M.2 slot with A key for wlan
- sata and usb2 (no superspeed components) on M.2 slot with B key for wwan
- On board SDHCI connected to pci-e
- USB3 ports
- libgfxinit-based graphic init
- NVRAM options for North and South bridges
- Sound
- Thinkpad EC
- S3
- TPM1 on LPC
- EHCI debug on SSP2 (USB3 port on the left)
- Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from
Linux payload (Heads), Seabios may also work.
Not tested:
- Fingerprint reader on USB2 (not present on mine)
- Keyboard backlight (not present on mine)
- "sticky_fn" flag in nvram
Not implemented yet:
- Fn locking in nvram (may not be identical to "sticky_fn")
- C-based native graphic init (since T431s has eDP instead of LVDS)
- Detecting the model of Soldered RAM at runtime, and loading the
corresponding SPD datum (3 observed) from CBFS (the mechanism may be
similar to that on x1_carbon_gen1 and s230u, but I do not know how
to find gpio ports for that, and SPD data stored in vendor firmware.)
Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a
Signed-off-by: Bill XIE <persmule@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'Documentation/mainboard/lenovo/t431s.md')
-rw-r--r-- | Documentation/mainboard/lenovo/t431s.md | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/Documentation/mainboard/lenovo/t431s.md b/Documentation/mainboard/lenovo/t431s.md new file mode 100644 index 0000000000..146e1c12a3 --- /dev/null +++ b/Documentation/mainboard/lenovo/t431s.md @@ -0,0 +1,42 @@ +# Lenovo T431s + +## Disassembly Instructions + +You must remove the following parts before flipping the mainboard +off the main frame: + +![t431s_bc_removed](t431s_bc_removed.jpg) + +* Base cover +* Hard disk drive +* Battery pack +* Keyboard + +Its [Hardware Maintenance Manual](https://thinkpads.com/support/hmm/hmm_pdf/t431s_hmm_en_0c10894_02.pdf) could be used as a guidance of disassembly. + +![t431s_flash_chip](t431s_flash_chip.jpg) + +The WSON-8 flash chip (surrounded with red circle in the photo above) +sits on the opposite side of the mainboard, under a piece of insulating +tape. If solders between the chip and soldering pads fortunately +overflows beside the chip as tiny tin balls attached to soldering pads, +it will be possible to use a pomona 5250 clip to hold the chip, with +its metal tips just attached to tin balls, thus connecting the chip to +the programmer. + +![t431s_programming](t431s_programming.jpg) + +```eval_rst +:doc:`../../flash_tutorial/ext_power` +``` + +Currently, detecting the model of soldered RAM at runtime and loading +the corresponding SPD datum from CBFS is not implemented yet. You may +have to dump the SPD data when running the vendor firmware with +inteltool, and replace the content of the SPD hex with what is dumped. + +(the mechanism may be similar to that on x1_carbon_gen1 and s230u, but +I do not know how to find gpio ports for that, and SPD data stored in +vendor firmware.) + +[T420 / T520 / X220 / T420s / W520 common]: xx20_series.md |