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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2019-11-01 16:58:10 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-11-04 11:33:32 +0000
commit3d4f51ef695ff2473b963a33cfdfeb4d864d3f4a (patch)
tree07bda561796e7a952c5b97cec116c6f9642a7794 /Documentation/mainboard/intel
parent1845fc89476df67c5981cb2d67ddb11d271154bb (diff)
mb/google/drallion: Correct GPP_E7 as stop pin
Current design reset pin is connected to PLTRST. GPP_E7 is stop pin for touch. Reserve reset pin for next stage implement. BUG=b:143733039 BRANCH=N/A TEST=check touch screen can work properly Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I3ebd56ab49b87da425583da04f082e69293a023e Reviewed-on: https://review.coreboot.org/c/coreboot/+/36535 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mathew King <mathewk@chromium.org>
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