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authorSubrata Banik <subrata.banik@intel.com>2018-11-26 11:36:15 +0530
committerPatrick Georgi <pgeorgi@google.com>2018-11-27 08:56:49 +0000
commit0c273ae208bb3ce74282e90b2bd68d9df114f136 (patch)
tree4b4049c91bf4444b271a9d5a52f91dfe9897409f /Documentation/mainboard/intel
parent92d7017a045bbc1ba20d5615bd35e0d70aa151b7 (diff)
Documentation/../../icelake_rvp: Add RVP coreboot development documentation
Change-Id: If063cbd3436d9ee107945f425a31ba0009039a1d Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/29828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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+# Intel Ice Lake RVP (Reference Validation Platform)
+
+This page describes how to run coreboot on the Intel icelake_rvp board.
+
+Ice Lake RVP is based on Intel Ice Lake platform, please refer to below link to get more details
+```eval_rst
+:doc:`../../soc/intel/iceLake_coreboot_development.md`
+```
+
+## Building coreboot
+
+* Follow build instructions mentioned in Ice Lake document
+```eval_rst
+:doc:`../../soc/intel/iceLake_coreboot_development.md`
+```
+
+* The default options for this board should result in a fully working image:
+```bash
+ # echo "CONFIG_VENDOR_INTEL=y" > .config
+ # echo "CONFIG_BOARD_INTEL_ICELAKE_RVPU=y" >> .config
+ # make olddefconfig && make
+```
+
+## Flashing coreboot
+
+```eval_rst
++---------------------+------------+
+| Type | Value |
++=====================+============+
+| Socketed flash | no |
++---------------------+------------+
+| Vendor | Winbond |
++---------------------+------------+
+| Size | 32 MiB |
++---------------------+------------+
+| Internal flashing | yes |
++---------------------+------------+
+| External flashing | yes |
++---------------------+------------+
+```