diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2017-01-24 20:27:43 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-19 08:19:16 +0000 |
commit | a29498f59952e89e858affde52c3f7565ab7f210 (patch) | |
tree | 81af272ff0495a00f15d94ff01232b5c28b6a7a6 /Documentation/mainboard/foxconn | |
parent | 0ce41f1a116a816e774ebbd1130d27d7ee70e7e9 (diff) |
util/bucts: Add tool to manipulate BUC.TS bit on Intel targets
The purpose of this tool is to manipulate and get information about the
`Back Up Control, Top Swap` mechanism present on most Intel Southbridges.
This tool is initially written by Peter Stuge.
This tool makes it possible to have a backup mechanism for the
bootblock by using the southbridges Back Up Control Top Swap.
Sometimes it is also possible to circumvent vendor write protection mechanisms
in order to flash coreboot. An example of where this would be useful would be
the Lenovo Thinkpad X60 and T60.
Change-Id: I12cc2e91396f096fc979e23848e1929cb6c44fc5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18224
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard/foxconn')
0 files changed, 0 insertions, 0 deletions