diff options
author | Frans Hendriks <fhendriks@eltan.com> | 2019-06-04 13:53:05 +0200 |
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committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-06-05 13:03:43 +0000 |
commit | 43b6e2ed7108859297512a6d4194335fb8237d1b (patch) | |
tree | 26163bc7aa32cb13bffabee2092f2f1550118dac /Documentation/mainboard/facebook | |
parent | d622507450464db5ee6cff7de03f9649a299018b (diff) |
mainboard/facebook/fbg1701: Do initial mainboard commit
Initial support for Facebook FBG-1701 system.
coreboot implementation based on Intel Strago mainboard.
Configure 'Onboard memory manufacturer' which must match HW.
BUG=N/A
TEST=booting SeaBIOS and Linux 4.15+ kernel on Facebook FBG-1701
Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'Documentation/mainboard/facebook')
-rw-r--r-- | Documentation/mainboard/facebook/fbg1701.md | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/Documentation/mainboard/facebook/fbg1701.md b/Documentation/mainboard/facebook/fbg1701.md new file mode 100644 index 0000000000..89e8a6abbc --- /dev/null +++ b/Documentation/mainboard/facebook/fbg1701.md @@ -0,0 +1,83 @@ +# Facebook FBG-1701 + +This page describes how to run coreboot on the Facebook FBG1701. + +FBG1701 are assembled with different onboard memory modules: + Rev 1.0 Onboard Samsung K4B8G1646D-MYKO memory + Rev 1.1 and 1.2 Onboard Micron MT41K512M16HA-125A memory + +Use make menuconfig to configure `onboard memory manufacturer` in Mainboard +menu. + +## Required blobs + +This board currently requires: +fsp blob 3rdparty/fsp/BraswellFspBinPkg/FspBin/BSWFSP.fd +Microcode Intel Braswell cpuid 1046C4 version 410 + (Used pre-build binary retrieved from Intel site) + +## Flashing coreboot + +### Internal programming + +The main SPI flash can be accessed using [flashrom]. + +### External programming + +The system has an internal flash chip which is a 8 MiB soldered SOIC-8 chip. +This chip is located to the top middle side of the board. It's located +between SoC and Q7 connector. Use clip (or solder wires) to program +the chip. +Specifically, it's a Winbond W25Q64FW (1.8V), whose datasheet can be found +[here][W25Q64FW]. + +The system has an external flash chip which is a 8 MiB soldered SOIC-8 chip. +This chip is located in the middle of carrier board close to the flex cable +connection. +Specifically, it's a Winbond W25Q64FV (3.3V), whose datasheet can be found +[here][W25Q64FV]. + +## Known issues + +- None + +## Untested + +- hardware monitor +- SDIO +- Full Embedded Controller support + +## Working + +- USB +- Gigabit Ethernet +- integrated graphics +- flashrom +- external graphics +- PCIe +- eMMC +- SATA +- serial port +- SMBus +- HDA +- initialization with FSP MR2 +- SeaBIOS payload +- Embedded Linux (Ubuntu 4.15+) + +## Technology + +```eval_rst ++------------------+--------------------------------------------------+ +| SoC | Intel Atom Processor N3710 | ++------------------+--------------------------------------------------+ +| CPU | Intel Braswell (N3710) | ++------------------+--------------------------------------------------+ +| Super I/O, EC | ITE8256 | ++------------------+--------------------------------------------------+ +| Coprocessor | Intel Management Engine | ++------------------+--------------------------------------------------+ +``` + +[W25Q64FW]: https://www.winbond.com/resource-files/w25q64fw%20revn%2005182017%20sfdp.pdf +[W25Q64FV]: https://www.winbond.com/resource-files/w25q64fv%20revs%2007182017.pdf +[flashrom]: https://flashrom.org/Flashrom |