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| author | Julien Viard de Galbert <julien@vdg.name> | 2020-11-07 23:40:43 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-20 00:42:38 +0000 |
| commit | 1c33f740c444c27e61e025a74ed99955f2ea0288 (patch) | |
| tree | f828dfb4fcef3adc59be0ccc9a0824cf3a564c29 /Documentation/mainboard/cavium | |
| parent | 50a6fe73c6304077a959c483d0d31054ce7177b2 (diff) | |
src/soc/intel/denverton_ns: Use improvement in coreboot since 4.9
- enable microcode in cbfs (won't boot without microcode)
- force num fit entry to 1 to avoid crash in cbfstool/fit.c
- re-enable FSP-CAR (tested to boot, while I couldn't boot with NEM)
- enable io driver for uart in legacy mode (ie emulating legacy port by
configuring the pci to legacy io address and hiding the pci device)
Signed-off-by: Julien Viard de Galbert <julien@vdg.name>
Change-Id: Ibc5ce91118c6052af23642fb3461f574cd888dea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Mariusz Szafrański <mariuszx.szafranski@intel.com>
Diffstat (limited to 'Documentation/mainboard/cavium')
0 files changed, 0 insertions, 0 deletions