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author | Hannah Williams <hannah.williams@intel.com> | 2016-03-14 17:38:51 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2016-04-11 17:57:55 +0200 |
commit | b13d454f35a00e4515e4eae0b3d22255db8a034f (patch) | |
tree | b05969c2a63251f9be6c83c6f3c878b18c2bbf94 /Documentation/hypertransport.svg | |
parent | 064a50160a55058a7baa00a91cbb9ceb0126cda6 (diff) |
soc/intel/apollolake: Enable CACHE_MRC_SETTINGS
This enables CACHE_MRC_SETTINGS by default as well selects
timer configuration.
Change-Id: I0248001892ef763c39097848b5adc8c1befed1f0
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14252
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'Documentation/hypertransport.svg')
0 files changed, 0 insertions, 0 deletions