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authorHuayang Duan <huayang.duan@mediatek.com>2020-06-01 16:30:27 +0800
committerHung-Te Lin <hungte@chromium.org>2020-09-25 01:33:11 +0000
commit63ee16075e7e4dee90c0cb9b05caeb91f77bf1e5 (patch)
tree31a9df5073b1248a6dece2d390e017da733e3a31 /Documentation/getting_started/kconfig.md
parent92c1546c01795f8c8c079e7ea03c9cb36314e92a (diff)
soc/mediatek/mt8183: Enable CA perbit mechanism
LPDDR4x has 6 CA PINs, but for some 8GB LPDDR4X DDR, the left margin of some CA PIN window is too small than others. Need to enable the CA perbit mechanism to avoid those risks. BUG=none BRANCH=kukui TEST=Boots correctly on Kukui Change-Id: I58e29d0c91a469112b0b1292da80bcb802322d47 Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41965 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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