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| author | Subrata Banik <subrata.banik@intel.com> | 2020-08-08 12:34:25 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-08-12 06:00:35 +0000 |
| commit | 41934bfe943243491d41fae1f9ff236351822a73 (patch) | |
| tree | 3fb3b0113f20bb4e052572ae1e0b5b98d53055bc /Documentation/conf.py | |
| parent | 2276ffa3800e3374b2659a7d03abbe3485318ebc (diff) | |
soc/intel/common/block/sata: Add common SATA driver
Enable PCI_COMMAND_MASTER for SATA controller to ensure device can
behave as a bus master. Otherwise, the device can not generate PCI
accesses.
BUG=b:154900210
TEST=Able to build and boot CML and TGL platform.
Change-Id: Icc6653c26900354df4ee6e5882c60cbe23a5685c
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44299
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/conf.py')
0 files changed, 0 insertions, 0 deletions