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authorAngel Pons <th3fanbus@gmail.com>2021-03-17 11:24:59 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-03-25 07:51:50 +0000
commitf5ec52a5226d9171b665ed2203c228748882f464 (patch)
treec13ac96afb425ed4f17f798075dd0599694ea91b /Documentation/conf.py
parentd0f971fe9a5d3c081d932a767b7373acc5f00b4a (diff)
nb/intel/haswell: Move USB config API into Lynx Point
Both EHCI and xHCI USB controllers are inside the PCH (southbridge). Now that mainboard USB configuration no longer depends on pei_data.h definitions, the API declarations can be placed in southbridge code. Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical. Change-Id: Ia21991b225482b33c5bc0dc52884674d301b28ba Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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