diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2020-06-26 14:29:40 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-08-07 08:30:35 +0000 |
| commit | 33aa115574ef70c3ae5baf1a2e489a9a7573052e (patch) | |
| tree | e374b29a3c2847870b74019e33cfb5bbbf13bea0 /Documentation/codeflow.svg | |
| parent | b0586d99116fff6f65aa69f8f12eff526f78cdbf (diff) | |
soc/intel/common: Log CSE FW Status Registers before triggering recovery
The patch logs CSE Firmware Status Registers(FWSTS1, FWSTS2 & FWSTS3)
before triggering recovery to help debugging.
BUG=b:159962240
Test=Verified on hatch
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I90e9f5897408bfc37a69cf0bb23bff18a146b9e2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43537
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/codeflow.svg')
0 files changed, 0 insertions, 0 deletions