diff options
| author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:10:19 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:24 +0000 |
| commit | 6c3ece9c9ef73db5c0e02cc5a41c98f46b86c3e9 (patch) | |
| tree | 23a804c556938f20002a2727ac62495a9bb982fe /Documentation/arch/x86 | |
| parent | d4c55353e044e157994eaf15b78103a9473e5440 (diff) | |
Documentation: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/arch/x86')
| -rw-r--r-- | Documentation/arch/x86/index.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/arch/x86/index.md b/Documentation/arch/x86/index.md index 0e14115db8..a30c5e25f8 100644 --- a/Documentation/arch/x86/index.md +++ b/Documentation/arch/x86/index.md @@ -92,6 +92,6 @@ Here's a list of known issues: page tables in ROM will be loaded and used, which breaks code and data as the page table doesn't contain the expected data. This in turn leads to undefined behaviour whenever the 'wrong' address is being read. -* Disabling paging in compability mode crashes the CPU. -* Returning from long mode to compability mode crashes the CPU. +* Disabling paging in compatibility mode crashes the CPU. +* Returning from long mode to compatibility mode crashes the CPU. * Entering long mode crashes on AMD host platforms. |