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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-04 13:43:03 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-04-05 13:33:31 +0000 |
| commit | 92646ea3e3456a0a975775a1f5aa5dc011a9b1b6 (patch) | |
| tree | 41fa48a2be2c72cc862431933fab741bf4dc9474 /Documentation/arch/riscv | |
| parent | deeccbf4e96de1cd4ed136f865b96a90db374886 (diff) | |
sb/intel/i82801gx: Improve code formatting
This mainly updates the formatting for the new 96 characters text width.
Change-Id: Ia75c3ca7136b0291b3ae82e6a281cc76b75965ca
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40127
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/arch/riscv')
0 files changed, 0 insertions, 0 deletions