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| author | Alexey Buyanov <alexey.buyanov@intel.com> | 2020-07-28 19:59:45 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-26 07:36:21 +0000 |
| commit | 12016969c50a34b7385ca435554be9670d031ea4 (patch) | |
| tree | 1295e67db8b3aa2f17593b03a1000ec786c78e97 /Documentation/arch/riscv | |
| parent | 85a44639768e8365ba5e34e6752c7481534797b9 (diff) | |
soc/intel/tigerlake: Rename pch_init() code
Rename the pch_init function to bootblock_pch_init and romstage_pch_init
according to the stage it is defined in.
TEST=successfully built and booted TGLRVP
Signed-off-by: Alexey Buyanov <alexey.buyanov@intel.com>
Change-Id: Ib7450fcdc3024dfb5e375a54f9bdcdca9bc373d8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44051
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'Documentation/arch/riscv')
0 files changed, 0 insertions, 0 deletions