summaryrefslogtreecommitdiff
path: root/Documentation/POSTCODES
diff options
context:
space:
mode:
authorKeith Short <keithshort@chromium.org>2019-05-16 14:07:43 -0600
committerDuncan Laurie <dlaurie@chromium.org>2019-05-22 16:53:19 +0000
commitbb41aba0d8c3c3cbfee44b0f7267e78fb7d012ee (patch)
tree66c4acc7abb2d19c37dbe8d470a87d64a0637631 /Documentation/POSTCODES
parent1835bf0fd4b77ab3eae1fb085be1667d13ed3144 (diff)
post_code: add post code for invalid vendor binary
Add a new post code POST_INVALID_VENDOR_BINARY, used when coreboot fails to locate or validate a vendor supplied binary. BUG=b:124401932 BRANCH=sarien TEST=build coreboot for sarien and arcada platforms Change-Id: Ib1e359d4e8772c37922b1b779135e58c73bff6b4 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32772 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'Documentation/POSTCODES')
-rw-r--r--Documentation/POSTCODES1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/POSTCODES b/Documentation/POSTCODES
index 162e863fed..855940f433 100644
--- a/Documentation/POSTCODES
+++ b/Documentation/POSTCODES
@@ -18,6 +18,7 @@ This is an (incomplete) list of POST codes emitted by coreboot v4.
0x89 Devices have been enabled
0xe0 Boot media (e.g. SPI ROM) is corrupt
0xe1 Resource stored within CBFS is corrupt
+0xe2 Vendor binary (e.g. FSP) generated a fatal error
0xf8 Entry into elf boot
0xf3 Jumping to payload