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authorJeff Daly <jeffd@silicom-usa.com>2022-01-11 15:44:20 -0500
committerFelix Held <felix-coreboot@felixheld.de>2022-06-17 14:53:18 +0000
commit5b67ad0a5f7a1ba9d5a4dc46c7d2dec1665f00d7 (patch)
tree39ab6e8ba32cf289083ae6df52ed8d303adb7392 /Documentation/POSTCODES
parente5ac30060298626cf12972209ea81a77d0569cde (diff)
soc/intel/denverton_ns: enable Denverton to use common msr defines
Use Intel common SoC msr.h for Denverton refactor Signed-off-by: Jeff Daly <jeffd@silicom-usa.com> Change-Id: Ic5f99fbcd2f936d4e020bd9b74b65dcd6e462bdc Reviewed-on: https://review.coreboot.org/c/coreboot/+/61016 Reviewed-by: Mariusz Szafrański <mariuszx.szafranski@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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