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| author | Arthur Heymans <arthur@aheymans.xyz> | 2016-12-13 15:21:24 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-16 18:29:28 +0100 |
| commit | f3018f9def40782f9c7dc7baa569eabd027f4c14 (patch) | |
| tree | faf0fb4d20806c22cfa07a4e230d722188ed54cc /Documentation/POSTCODES | |
| parent | 98915bb7a9ab696b3facf9a2fff3525ebb87531f (diff) | |
Set the fsb timer correctly for Netburst CPUs
On Netburst (Pentium 4) the fsb cannot be read from
MSR_FSB_FREQ (msr 0xcd). One has to use msr 0x2c instead.
Change-Id: I0beccba2e4a8ec5cd23537b2207f9c49a040fd73
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17832
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'Documentation/POSTCODES')
0 files changed, 0 insertions, 0 deletions