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authorShaunak Saha <shaunak.saha@intel.com>2016-07-06 15:50:48 -0700
committerAaron Durbin <adurbin@chromium.org>2016-07-12 20:39:37 +0200
commit066e0f392378fbb7e1628af937e88f86e1279158 (patch)
treef2bb3649450f36100863b43cdcf7713fe09651f1 /Documentation/Kconfig.tex
parent6e5c5a15bc9fe709943598ede0eb52f9766cbb02 (diff)
google/reef: Add GPE routing settings
This patch sets the devicetree for gpe0_dw configuration and also configures the GPIO lines for SCI. EC_SCI_GPI is configured to proper value. BUG = chrome-os-partner:53438 TEST = Toggle pch_sci_l from ec console using gpioset command and see that the sci counter increases in /sys/firmware/acpi/interrupt and also 9 in /proc/interrupt Change-Id: If258bece12768edb1e612c982514ce95c756c438 Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/15556 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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