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| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-17 17:40:05 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-23 18:12:17 +0000 |
| commit | a0cb713ce2caa065ae9d2de71f02d4cb2fd4914d (patch) | |
| tree | d8a1ddebadc7a4d83f8e4c80921279be74321c78 /Documentation/Intel | |
| parent | 8cb8374e3c8b3236527796df210ac3d6bbaf3065 (diff) | |
soc/intel/broadwell: Revise SA lockdown sequence
The MC_LOCK register was written twice and SA PM no longer has a lock
bit. Update the sequence as per the Broadwell BIOS Specification, but
keep the registers sorted by type.
Change-Id: I91cd0aa61ba6bc578c892c1a5bc973bf4c28d019
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46324
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/Intel')
0 files changed, 0 insertions, 0 deletions