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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-01-10 14:52:53 +0100
committerPatrick Rudolph <siro@das-labor.org>2019-01-15 07:46:28 +0000
commita649310ea478bff8092301bdd6128f36771afb2b (patch)
treee1d0c41b5e37208283ffc9922e9ffa83ffff55cb /Documentation/Intel
parent6085d39bdb2c23f91fdda752d96e37a57fef8f82 (diff)
mainboard/ocp/wedge100s: Fix uart
* Route IO 0x6e/0x6f to LPC bus * Setup ITE8526 in early_mainboard_romstage_entry * Fix romstage serial console by disabling internal uart default setting * Unselect CONFIG_INTEGRATED_UART, as it doesn't use internal UARTs * Select CONFIG_DRIVERS_UART_8250IO, as it has a SuperIO serial * Configure UPDs related to serial Change-Id: I59cd83ed43dbf4ee26685e4a573de153291f7074 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/30827 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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