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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-01-31 12:19:13 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-21 20:12:35 +0100 |
| commit | a4d81809137b8b53903303b201c2d1bfbc615143 (patch) | |
| tree | 6ecc8bfb79e267fb1480198a82739e3947900484 /Documentation/Intel/fsp1_1.html | |
| parent | b953d05e604917ad2acb935e06bcc0344f8a09a1 (diff) | |
Documentation: x86 MTRR setup, TempRamExit and MTRR loading
Document how to test TempRamExit and verify the MTRR setup and loading.
TEST=None
Change-Id: I57a604fa139edac4b05453547d3caf185db491e0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14113
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'Documentation/Intel/fsp1_1.html')
0 files changed, 0 insertions, 0 deletions