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author | Kane Chen <kane.chen@intel.com> | 2017-11-14 11:38:01 +0800 |
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committer | Shelley Chen <shchen@google.com> | 2017-11-27 03:55:42 +0000 |
commit | 73031bcce071f6e760cc0655200dd3be2f39c8b7 (patch) | |
tree | ada50f4d931400d333fb9ee6f6608b0d9786d5f6 /Documentation/Doxyfile.coreboot_simple | |
parent | 6919a9376e1fefc1072b638d754588d8ba287aed (diff) |
google/fizz: correct memory rcomp settings
Follow the schematic and Doc 573387 to correct the rcomp and
rcomp target settings for fizz
TEST= boot ok and the system can enter and resume from S3.
Change-Id: Iffa90461509cfadaca20e335a6655e549e79e749
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/22479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'Documentation/Doxyfile.coreboot_simple')
0 files changed, 0 insertions, 0 deletions