diff options
author | Furquan Shaikh <furquan@chromium.org> | 2017-08-02 19:06:05 -0700 |
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committer | Furquan Shaikh <furquan@google.com> | 2017-08-04 15:25:27 +0000 |
commit | 0767f89be48475a84339a71059f472a4d31e1d4d (patch) | |
tree | cfcd909f73e348b3d00b53a6b61a8788d84ecb9f /Documentation/Doxyfile.coreboot_simple | |
parent | 5a89b40b15eaf2522b5e08ac2bd69e5b8f9bd54b (diff) |
mainboard/google/soraka: Configure GPP_B8 in bootblock
GPP_B8 acts as input to the inverter whose output controls PERST#
signal to wifi module. Out of reset, GPP_B8 is configured as
input by default. Since there is no external pull-down on it, this
line is floating and results in PERST# being asserted until ramstage
where the GPIO was originally configured. Because of this the wifi
chip is not ready during the PCIe initialization step. Move the
configuration of GPP_B8 to bootblock so that wifi device is taken out
of reset as early as possible.
BUG=b:64181150,b:62726961
TEST=Verified with warm reboot and suspend-resume stress test that
wifi is still functional.
Change-Id: I68e1bd67499262a17daade72e9a9fd32934a184d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/20869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'Documentation/Doxyfile.coreboot_simple')
0 files changed, 0 insertions, 0 deletions