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authorCasper Chang <casper_chang@wistron.corp-partner.google.com>2021-08-27 16:34:03 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-08-28 17:44:51 +0000
commit621ae7c701033029352603f2978b7580295f59e3 (patch)
treebcd1463edfae24dd0530c2fd43f93c881e5691fb /Documentation/Doxyfile.coreboot
parent0d753e510808e66ffd5dc6ee71ff4e1db4c09ffa (diff)
mb/google/brya/variants/primus: update USB 2.0 controller Lane Parameter
Modify USB 2.0 port5 parameter to improve SI diagram measurement. BUG=b:187992881 TEST= Pass USB 2.0 SI Eye diagram measurement. Signed-off-by: Casper Chang <casper_chang@wistron.corp-partner.google.com> Change-Id: I1eff05a7ad6563898744c24f9657e28625319873 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57198 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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