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authorCong Yang <yangcong5@huaqin.corp-partner.google.com>2023-09-28 11:40:50 +0800
committerYu-Ping Wu <yupingso@google.com>2023-10-06 03:14:02 +0000
commit20a332a30e01117cdb093119cd308d4538ea3fc2 (patch)
tree55dc987d0d3987a4a1e3ced196211d381cd60636 /COPYING
parentdab7a86859724c006abe2cbb733d17e9e8c77ecc (diff)
mb/google/starmie: Add 3 ms delay to AW37503 Power IC panel timing
Based on the power sequence of the panel [1], the power on T3 sequence VSN to RESET should be larger than 1ms. Because the Power IC descending slope takes 2ms, actual measurement needs 3ms to meet the timing of panel sequence. [1] HX83102-J02_Datasheet_v03.pdf BUG=b:302212730 BRANCH=corsola TEST=emerge-staryu coreboot chromeos-bootimage and boot the panel Change-Id: I488c746d1fcfc165125b0ecccb0bccbb99231b00 Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78185 Reviewed-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@google.com>
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