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authorXavi Drudis Ferran <xdrudis@tinet.cat>2011-02-28 03:19:17 +0000
committerMarc Jones <marc.jones@amd.com>2011-02-28 03:19:17 +0000
commitce62350d8f5a619c9ce754caeb1e33224e0cce56 (patch)
treec55a1a71da3a265aa939eaa54115ed39fcd1c27d /COPYING
parente80ce0a134bc88581db40b02ce250bee5adba3a3 (diff)
Improving BKDG implementation of P-states,
CPU and northbridge frequency and voltage handling for Fam 10 in SVI mode. Add to init_fidvid_stage2 some step mentioned in BKDG 2.4.2.7 that was missing . Some lines are dead code now, but may handy if one day we support revison E CPUs. Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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