soc/intel/skylake: Convert to ASL 2.0 syntax

Change-Id: Iea915b60d8ec9a1a7a2aa5926b0277cae58113a6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46242
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>

12 files changed, 135 insertions, 139 deletions

diff --git a/src/soc/intel/skylake/acpi/dptf/charger.asl b/src/soc/intel/skylake/acpi/dptf/charger.asl
index fca9590c37..97c83553c0 100644
--- a/src/soc/intel/skylake/acpi/dptf/charger.asl
+++ b/src/soc/intel/skylake/acpi/dptf/charger.asl
@@ -9,7 +9,7 @@ Device (TCHG)
 
 	Method (_STA)
 	{
-		If (LEqual (\DPTE, One)) {
+		If (\DPTE == 1) {
 			Return (0xF)
 		} Else {
 			Return (0x0)
@@ -26,11 +26,11 @@ Device (TCHG)
 	Method (PPPC)
 	{
 		/* Convert size of PPSS table to index */
-		Store (SizeOf (\_SB.CHPS), Local0)
-		Decrement (Local0)
+		Local0 = SizeOf (\_SB.CHPS)
+		Local0--
 
 		/* Check if charging is disabled (AC removed) */
-		If (LEqual (\_SB.PCI0.LPCB.EC0.ACEX, Zero)) {
+		If (\_SB.PCI0.LPCB.EC0.ACEX == 0) {
 			/* Return last power state */
 			Return (Local0)
 		} Else {
@@ -45,8 +45,7 @@ Device (TCHG)
 	Method (SPPC, 1)
 	{
 		/* Retrieve Control (index 4) for specified PPSS level */
-		Store (DeRefOf (Index (DeRefOf (Index
-			(\_SB.CHPS, ToInteger (Arg0))), 4)), Local0)
+		Local0 = DeRefOf (DeRefOf (\_SB.CHPS [ToInteger (Arg0)]) [4])
 
 		/* Pass Control value to EC to limit charging */
 		\_SB.PCI0.LPCB.EC0.CHGS (Local0)
diff --git a/src/soc/intel/skylake/acpi/dptf/cpu.asl b/src/soc/intel/skylake/acpi/dptf/cpu.asl
index 9931f6ca1b..181b01a6b1 100644
--- a/src/soc/intel/skylake/acpi/dptf/cpu.asl
+++ b/src/soc/intel/skylake/acpi/dptf/cpu.asl
@@ -17,7 +17,7 @@ Device (B0D4)
 
 	Method (_STA)
 	{
-		If (LEqual (\DPTE, One)) {
+		If (\DPTE == 1) {
 			Return (0xF)
 		} Else {
 			Return (0x0)
@@ -35,7 +35,7 @@ Device (B0D4)
 
 	Method (SPPC, 1)
 	{
-		Store (Arg0, \PPCM)
+		\PPCM = Arg0
 
 		/* Notify OS to re-read _PPC limit on each CPU */
 		\PPCN ()
@@ -60,8 +60,8 @@ Device (B0D4)
 		If (CondRefOf (\_SB.MPDL)) {
 			Return (\_SB.MPDL)
 		} ElseIf (CondRefOf (\_SB.CP00._PSS)) {
-			Store (SizeOf (\_SB.CP00._PSS), Local0)
-			Decrement (Local0)
+			Local0 = SizeOf (\_SB.CP00._PSS)
+			Local0--
 			Return (Local0)
 		} Else {
 			Return (0)
diff --git a/src/soc/intel/skylake/acpi/dptf/dptf.asl b/src/soc/intel/skylake/acpi/dptf/dptf.asl
index 8852e0a9ad..e72437a520 100644
--- a/src/soc/intel/skylake/acpi/dptf/dptf.asl
+++ b/src/soc/intel/skylake/acpi/dptf/dptf.asl
@@ -24,7 +24,7 @@ Device (DPTF)
 
 	Method (_STA)
 	{
-		If (LEqual (\DPTE, One)) {
+		If (\DPTE == 1) {
 			Return (0xF)
 		} Else {
 			Return (0x0)
@@ -41,7 +41,7 @@ Device (DPTF)
 	Method (_OSC, 4, Serialized)
 	{
 		/* Check for Passive Policy UUID */
-		If (LEqual (DeRefOf (Index (IDSP, 0)), Arg0)) {
+		If (DeRefOf (IDSP [0]) == Arg0) {
 			/* Initialize Thermal Devices */
 			^TINI ()
 
@@ -73,10 +73,10 @@ Device (DPTF)
 	/* Convert from Degrees C to 1/10 Kelvin for ACPI */
 	Method (CTOK, 1) {
 		/* 10th of Degrees C */
-		Multiply (Arg0, 10, Local0)
+		Local0 = Arg0 * 10
 
 		/* Convert to Kelvin */
-		Add (Local0, 2732, Local0)
+		Local0 += 2732
 
 		Return (Local0)
 	}
diff --git a/src/soc/intel/skylake/acpi/dptf/fan.asl b/src/soc/intel/skylake/acpi/dptf/fan.asl
index 6d60c63136..eb75ba94ab 100644
--- a/src/soc/intel/skylake/acpi/dptf/fan.asl
+++ b/src/soc/intel/skylake/acpi/dptf/fan.asl
@@ -32,19 +32,19 @@ Device (TFN1)
 	Method (_FST, 0, Serialized,,PkgObj)
 	{
 		/* Fill in TFST with current control. */
-		Store (\_SB.PCI0.LPCB.EC0.FAND, Index (TFST, 1))
+		TFST [1] = \_SB.PCI0.LPCB.EC0.FAND
 		Return (TFST)
 	}
 
 	/* _FSL: Fan Speed Level */
 	Method (_FSL, 1, Serialized)
 	{
-		Store (Arg0, \_SB.PCI0.LPCB.EC0.FAND)
+		\_SB.PCI0.LPCB.EC0.FAND = Arg0
 	}
 
 	Method (_STA)
 	{
-		If (LEqual (\DPTE, One))
+		If (\DPTE == 1)
 		{
 			Return (0xF)
 		} Else {
diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl
index 3aead2bf43..95912a47fa 100644
--- a/src/soc/intel/skylake/acpi/dptf/thermal.asl
+++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl
@@ -8,22 +8,22 @@ Method (TEVT, 1, NotSerialized)
 {
 
 #ifdef DPTF_TSR0_SENSOR_ID
-	If (LEqual (ToInteger (Arg0), DPTF_TSR0_SENSOR_ID)) {
+	If (ToInteger (Arg0) == DPTF_TSR0_SENSOR_ID) {
 		Notify (^TSR0, 0x90)
 	}
 #endif
 #ifdef DPTF_TSR1_SENSOR_ID
-	If (LEqual (ToInteger (Arg0), DPTF_TSR1_SENSOR_ID)) {
+	If (ToInteger (Arg0) == DPTF_TSR1_SENSOR_ID) {
 		Notify (^TSR1, 0x90)
 	}
 #endif
 #ifdef DPTF_TSR2_SENSOR_ID
-	If (LEqual (ToInteger (Arg0), DPTF_TSR2_SENSOR_ID)) {
+	If (ToInteger (Arg0) == DPTF_TSR2_SENSOR_ID) {
 		Notify (^TSR2, 0x90)
 	}
 #endif
 #ifdef DPTF_TSR3_SENSOR_ID
-	If (LEqual (ToInteger (Arg0), DPTF_TSR3_SENSOR_ID)) {
+	If (ToInteger (Arg0) == DPTF_TSR3_SENSOR_ID) {
 		Notify (^TSR3, 0x90)
 	}
 #endif
@@ -78,7 +78,7 @@ External (\_SB.PCI0.LPCB.EC0.RCDP, MethodObj)
 Method (DTRP, 2, Serialized)
 {
 	If (CondRefOf (\_SB.PCI0.LPCB.EC0.RCDP)) {
-		If (LEqual (\_SB.PCI0.LPCB.EC0.RCDP, One)) {
+		If (\_SB.PCI0.LPCB.EC0.RCDP == 1) {
 			Return (CTOK (Arg0))
 		}
 	}
@@ -106,7 +106,7 @@ Device (TSR0)
 
 	Method (_STA)
 	{
-		If (LEqual (\DPTE, One)) {
+		If (\DPTE == 1) {
 			Return (0xF)
 		} Else {
 			Return (0x0)
@@ -215,7 +215,7 @@ Device (TSR1)
 
 	Method (_STA)
 	{
-		If (LEqual (\DPTE, One)) {
+		If (\DPTE == 1) {
 			Return (0xF)
 		} Else {
 			Return (0x0)
@@ -312,7 +312,7 @@ Device (TSR2)
 
 	Method (_STA)
 	{
-		If (LEqual (\DPTE, One)) {
+		If (\DPTE == 1) {
 			Return (0xF)
 		} Else {
 			Return (0x0)
@@ -376,7 +376,7 @@ Device (TSR3)
 
 	Method (_STA)
 	{
-		If (LEqual (\DPTE, One)) {
+		If (\DPTE == 1) {
 			Return (0xF)
 		} Else {
 			Return (0x0)
diff --git a/src/soc/intel/skylake/acpi/globalnvs.asl b/src/soc/intel/skylake/acpi/globalnvs.asl
index 1ae61fd62b..97a69d596d 100644
--- a/src/soc/intel/skylake/acpi/globalnvs.asl
+++ b/src/soc/intel/skylake/acpi/globalnvs.asl
@@ -51,23 +51,23 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
 /* Set flag to enable USB charging in S3 */
 Method (S3UE)
 {
-	Store (One, \S3U0)
+	\S3U0 = 1
 }
 
 /* Set flag to disable USB charging in S3 */
 Method (S3UD)
 {
-	Store (Zero, \S3U0)
+	\S3U0 = 0
 }
 
 /* Set flag to enable USB charging in S5 */
 Method (S5UE)
 {
-	Store (One, \S5U0)
+	\S5U0 = 1
 }
 
 /* Set flag to disable USB charging in S5 */
 Method (S5UD)
 {
-	Store (Zero, \S5U0)
+	\S5U0 = 0
 }
diff --git a/src/soc/intel/skylake/acpi/irqlinks.asl b/src/soc/intel/skylake/acpi/irqlinks.asl
index 483be59d87..63d450c5f9 100644
--- a/src/soc/intel/skylake/acpi/irqlinks.asl
+++ b/src/soc/intel/skylake/acpi/irqlinks.asl
@@ -10,9 +10,8 @@
  * https://bugs.acpica.org/show_bug.cgi?id=1201
  */
 OperationRegion (ITSS, SystemMemory,
-		 Add (PCR_ITSS_PIRQA_ROUT,
-		      Add (CONFIG_PCR_BASE_ADDRESS,
-		           ShiftLeft (PID_ITSS, PCR_PORTID_SHIFT))), 8)
+		 PCR_ITSS_PIRQA_ROUT + CONFIG_PCR_BASE_ADDRESS + (PID_ITSS << PCR_PORTID_SHIFT),
+		8)
 Field (ITSS, ByteAcc, NoLock, Preserve)
 {
 	PIRA, 8,	/* PIRQA Routing Control */
@@ -46,10 +45,10 @@ Device (LNKA)
 			IRQ (Level, ActiveLow, Shared) {}
 		})
 		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
+		IRQ0 = 0
 
 		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRA, ^^IREM), IRQ0)
+		IRQ0 = 1 << (^^PIRA & ^^IREM)
 
 		Return (RTLA)
 	}
@@ -58,13 +57,13 @@ Device (LNKA)
 	{
 		CreateWordField (Arg0, 1, IRQ0)
 		FindSetRightBit (IRQ0, Local0)
-		Decrement (Local0)
-		Store (Local0, ^^PIRA)
+		Local0--
+		^^PIRA = Local0
 	}
 
 	Method (_STA, 0, Serialized)
 	{
-		If (And (^^PIRA, ^^IREN)) {
+		If (^^PIRA & ^^IREN) {
 			Return (0x9)
 		} Else {
 			Return (0xb)
@@ -73,7 +72,7 @@ Device (LNKA)
 
 	Method (_DIS, 0, Serialized)
 	{
-		Or (^^PIRA, ^^IREN, ^^PIRA)
+		^^PIRA |= ^^IREN
 	}
 }
 
@@ -95,10 +94,10 @@ Device (LNKB)
 			IRQ (Level, ActiveLow, Shared) {}
 		})
 		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
+		IRQ0 = 0
 
 		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRB, ^^IREM), IRQ0)
+		IRQ0 = 1 << (^^PIRB & ^^IREM)
 
 		Return (RTLA)
 	}
@@ -107,13 +106,13 @@ Device (LNKB)
 	{
 		CreateWordField (Arg0, 1, IRQ0)
 		FindSetRightBit (IRQ0, Local0)
-		Decrement (Local0)
-		Store (Local0, ^^PIRB)
+		Local0--
+		^^PIRB = Local0
 	}
 
 	Method (_STA, 0, Serialized)
 	{
-		If (And (^^PIRB, ^^IREN)) {
+		If (^^PIRB & ^^IREN) {
 			Return (0x9)
 		} Else {
 			Return (0xb)
@@ -122,7 +121,7 @@ Device (LNKB)
 
 	Method (_DIS, 0, Serialized)
 	{
-		Or (^^PIRB, ^^IREN, ^^PIRB)
+		^^PIRB |= ^^IREN
 	}
 }
 
@@ -144,10 +143,10 @@ Device (LNKC)
 			IRQ (Level, ActiveLow, Shared) {}
 		})
 		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
+		IRQ0 = 0
 
 		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRC, ^^IREM), IRQ0)
+		IRQ0 = 1 << (^^PIRC & ^^IREM)
 
 		Return (RTLA)
 	}
@@ -156,13 +155,13 @@ Device (LNKC)
 	{
 		CreateWordField (Arg0, 1, IRQ0)
 		FindSetRightBit (IRQ0, Local0)
-		Decrement (Local0)
-		Store (Local0, ^^PIRC)
+		Local0--
+		^^PIRC = Local0
 	}
 
 	Method (_STA, 0, Serialized)
 	{
-		If (And (^^PIRC, ^^IREN)) {
+		If (^^PIRC & ^^IREN) {
 			Return (0x9)
 		} Else {
 			Return (0xb)
@@ -171,7 +170,7 @@ Device (LNKC)
 
 	Method (_DIS, 0, Serialized)
 	{
-		Or (^^PIRC, ^^IREN, ^^PIRC)
+		^^PIRC |= ^^IREN
 	}
 }
 
@@ -193,10 +192,10 @@ Device (LNKD)
 			IRQ (Level, ActiveLow, Shared) {}
 		})
 		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
+		IRQ0 = 0
 
 		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRD, ^^IREM), IRQ0)
+		IRQ0 = 1 << (^^PIRD & ^^IREM)
 
 		Return (RTLA)
 	}
@@ -205,13 +204,13 @@ Device (LNKD)
 	{
 		CreateWordField (Arg0, 1, IRQ0)
 		FindSetRightBit (IRQ0, Local0)
-		Decrement (Local0)
-		Store (Local0, ^^PIRD)
+		Local0--
+		^^PIRD = Local0
 	}
 
 	Method (_STA, 0, Serialized)
 	{
-		If (And (^^PIRD, ^^IREN)) {
+		If (^^PIRD & ^^IREN) {
 			Return (0x9)
 		} Else {
 			Return (0xb)
@@ -220,7 +219,7 @@ Device (LNKD)
 
 	Method (_DIS, 0, Serialized)
 	{
-		Or (^^PIRD, ^^IREN, ^^PIRD)
+		^^PIRD |= ^^IREN
 	}
 }
 
@@ -242,10 +241,10 @@ Device (LNKE)
 			IRQ (Level, ActiveLow, Shared) {}
 		})
 		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
+		IRQ0 = 0
 
 		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRE, ^^IREM), IRQ0)
+		IRQ0 = 1 << (^^PIRE & ^^IREM)
 
 		Return (RTLA)
 	}
@@ -254,13 +253,13 @@ Device (LNKE)
 	{
 		CreateWordField (Arg0, 1, IRQ0)
 		FindSetRightBit (IRQ0, Local0)
-		Decrement (Local0)
-		Store (Local0, ^^PIRE)
+		Local0--
+		^^PIRE = Local0
 	}
 
 	Method (_STA, 0, Serialized)
 	{
-		If (And (^^PIRE, ^^IREN)) {
+		If (^^PIRE & ^^IREN) {
 			Return (0x9)
 		} Else {
 			Return (0xb)
@@ -269,7 +268,7 @@ Device (LNKE)
 
 	Method (_DIS, 0, Serialized)
 	{
-		Or (^^PIRE, ^^IREN, ^^PIRE)
+		^^PIRE |= ^^IREN
 	}
 }
 
@@ -291,10 +290,10 @@ Device (LNKF)
 			IRQ (Level, ActiveLow, Shared) {}
 		})
 		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
+		IRQ0 = 0
 
 		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRF, ^^IREM), IRQ0)
+		IRQ0 = 1 << (^^PIRF & ^^IREM)
 
 		Return (RTLA)
 	}
@@ -303,13 +302,13 @@ Device (LNKF)
 	{
 		CreateWordField (Arg0, 1, IRQ0)
 		FindSetRightBit (IRQ0, Local0)
-		Decrement (Local0)
-		Store (Local0, ^^PIRF)
+		Local0--
+		^^PIRF = Local0
 	}
 
 	Method (_STA, 0, Serialized)
 	{
-		If (And (^^PIRF, ^^IREN)) {
+		If (^^PIRF & ^^IREN) {
 			Return (0x9)
 		} Else {
 			Return (0xb)
@@ -318,7 +317,7 @@ Device (LNKF)
 
 	Method (_DIS, 0, Serialized)
 	{
-		Or (^^PIRF, ^^IREN, ^^PIRF)
+		^^PIRF |= ^^IREN
 	}
 }
 
@@ -340,10 +339,10 @@ Device (LNKG)
 			IRQ (Level, ActiveLow, Shared) {}
 		})
 		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
+		IRQ0 = 0
 
 		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRG, ^^IREM), IRQ0)
+		IRQ0 = 1 <<  (^^PIRG & ^^IREM)
 
 		Return (RTLA)
 	}
@@ -352,13 +351,13 @@ Device (LNKG)
 	{
 		CreateWordField (Arg0, 1, IRQ0)
 		FindSetRightBit (IRQ0, Local0)
-		Decrement (Local0)
-		Store (Local0, ^^PIRG)
+		Local0--
+		^^PIRG = Local0
 	}
 
 	Method (_STA, 0, Serialized)
 	{
-		If (And (^^PIRG, ^^IREN)) {
+		If (^^PIRG & ^^IREN) {
 			Return (0x9)
 		} Else {
 			Return (0xb)
@@ -367,7 +366,7 @@ Device (LNKG)
 
 	Method (_DIS, 0, Serialized)
 	{
-		Or (^^PIRG, ^^IREN, ^^PIRG)
+		^^PIRG |= ^^IREN
 	}
 }
 
@@ -389,10 +388,10 @@ Device (LNKH)
 			IRQ (Level, ActiveLow, Shared) {}
 		})
 		CreateWordField (RTLA, 1, IRQ0)
-		Store (Zero, IRQ0)
+		IRQ0 = 0
 
 		/* Set the bit from PIRQ Routing Register */
-		ShiftLeft (1, And (^^PIRH, ^^IREM), IRQ0)
+		IRQ0 = 1 << (^^PIRH & ^^IREM)
 
 		Return (RTLA)
 	}
@@ -401,13 +400,13 @@ Device (LNKH)
 	{
 		CreateWordField (Arg0, 1, IRQ0)
 		FindSetRightBit (IRQ0, Local0)
-		Decrement (Local0)
-		Store (Local0, ^^PIRH)
+		Local0--
+		^^PIRH = Local0
 	}
 
 	Method (_STA, 0, Serialized)
 	{
-		If (And (^^PIRH, ^^IREN)) {
+		If (^^PIRH & ^^IREN) {
 			Return (0x9)
 		} Else {
 			Return (0xb)
@@ -416,6 +415,6 @@ Device (LNKH)
 
 	Method (_DIS, 0, Serialized)
 	{
-		Or (^^PIRH, ^^IREN, ^^PIRH)
+		^^PIRH |= ^^IREN
 	}
 }
diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl
index 9c3385f9ab..d2e922c359 100644
--- a/src/soc/intel/skylake/acpi/pch.asl
+++ b/src/soc/intel/skylake/acpi/pch.asl
@@ -47,7 +47,7 @@
 Method (_OSC, 4)
 {
 	/* Check for proper GUID */
-	If (LEqual (Arg0, ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
+	If (Arg0 == ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
 	{
 		/* Let OS control everything */
 		Return (Arg3)
@@ -56,7 +56,7 @@ Method (_OSC, 4)
 	{
 		/* Unrecognized UUID */
 		CreateDWordField (Arg3, 0, CDW1)
-		Or (CDW1, 4, CDW1)
+		CDW1 |= 4
 		Return (Arg3)
 	}
 }
diff --git a/src/soc/intel/skylake/acpi/pch_hda.asl b/src/soc/intel/skylake/acpi/pch_hda.asl
index 04e974fe11..3de64b7f42 100644
--- a/src/soc/intel/skylake/acpi/pch_hda.asl
+++ b/src/soc/intel/skylake/acpi/pch_hda.asl
@@ -26,19 +26,17 @@ Device (HDAS)
 	 */
 	Method (_DSM, 4)
 	{
-		If (LEqual (Arg0, ^UUID)) {
+		If (Arg0 == ^UUID) {
 			/*
 			 * Function 0: Function Support Query
 			 * Returns a bitmask of functions supported.
 			 */
-			If (LEqual (Arg2, Zero)) {
+			If (Arg2 == 0) {
 				/*
 				 * NHLT Query only supported for revision 1 and
 				 * if NHLT address and length are set in NVS.
 				 */
-				If (LAnd (LEqual (Arg1, One),
-					  LAnd (LNotEqual (NHLA, Zero),
-						LNotEqual (NHLL, Zero)))) {
+				If ((Arg1 == 1) && (NHLA != 0) && (NHLL != 0)) {
 					Return (Buffer (One) { 0x03 })
 				} Else {
 					Return (Buffer (One) { 0x01 })
@@ -52,14 +50,14 @@ Device (HDAS)
 			 *
 			 * Returns a pointer to NHLT table in memory.
 			 */
-			If (LEqual (Arg2, One)) {
+			If (Arg2 == 1) {
 				CreateQWordField (NBUF, ^NHLT._MIN, NBAS)
 				CreateQWordField (NBUF, ^NHLT._MAX, NMAS)
 				CreateQWordField (NBUF, ^NHLT._LEN, NLEN)
 
-				Store (NHLA, NBAS)
-				Store (NHLA, NMAS)
-				Store (NHLL, NLEN)
+				NBAS = NHLA
+				NMAS = NHLA
+				NLEN = NHLL
 
 				Return (NBUF)
 			}
diff --git a/src/soc/intel/skylake/acpi/scs.asl b/src/soc/intel/skylake/acpi/scs.asl
index 356a7e0e31..13b8d4bffd 100644
--- a/src/soc/intel/skylake/acpi/scs.asl
+++ b/src/soc/intel/skylake/acpi/scs.asl
@@ -27,13 +27,13 @@ Device (EMMC)
 	 */
 	Method (_DSM, 4)
 	{
-		If (LEqual (Arg0, ^UUID)) {
+		If (Arg0 == ^UUID) {
 			/*
 			 * Function 9: Device Readiness Durations
 			 * Returns a package of five integers covering
 			 * various device related delay in PCIe Base Spec.
 			 */
-			If (LEqual (Arg2, 9)) {
+			If (Arg2 == 9) {
 				/*
 				 * Function 9 support for revision 3.
 				 * ECN link for function definitions
@@ -41,7 +41,7 @@ Device (EMMC)
 				 * specification_documents/
 				 * ECN_fw_latency_optimization_final.pdf]
 				 */
-				If (LEqual (Arg1, 3)) {
+				If (Arg1 == 3) {
 					/*
 					 * Integer 0: FW reset time.
 					 * Integer 1: FW data link up time.
@@ -64,7 +64,7 @@ Device (EMMC)
 	Method (_PS0, 0, Serialized)
 	{
 		/* Disable Power Gate */
-		Store (0, ^PGEN)
+		^PGEN = 0
 
 		/* Clear bits 31, 6, 2, 0 */
 		^^PCRA (PID_SCS, 0x600, 0x7FFFFFBA)
@@ -74,18 +74,18 @@ Device (EMMC)
 		^^PCRO (PID_SCS, 0x600, 0x80000045)
 
 		/* Set Power State to D0 */
-		And (PMCR, 0xFFFC, PMCR)
-		Store (PMCR, ^TEMP)
+		PMCR &= 0xFFFC
+		^TEMP = PMCR
 	}
 
 	Method (_PS3, 0, Serialized)
 	{
 		/* Enable Power Gate */
-		Store (1, ^PGEN)
+		^PGEN = 1
 
 		/* Set Power State to D3 */
-		Or (PMCR, 0x0003, PMCR)
-		Store (PMCR, ^TEMP)
+		PMCR |= 0x0003
+		^TEMP = PMCR
 	}
 
 	Device (CARD)
@@ -126,7 +126,7 @@ Device (SDXC)
 		^^PCRA (PID_GPIOCOM3, 0x4f4, 0xFFFFEFFF)
 
 		/* Disable Power Gate */
-		Store (0, ^PGEN)
+		^PGEN = 0
 
 		/* Clear bits 8, 7, 2, 0 */
 		^^PCRA (PID_SCS, 0x600, 0xFFFFFE7A)
@@ -136,18 +136,18 @@ Device (SDXC)
 		^^PCRO (PID_SCS, 0x600, 0x00000185)
 
 		/* Set Power State to D0 */
-		And (PMCR, 0xFFFC, PMCR)
-		Store (PMCR, ^TEMP)
+		PMCR &= 0xFFFC
+		^TEMP = PMCR
 	}
 
 	Method (_PS3, 0, Serialized)
 	{
 		/* Enable Power Gate */
-		Store (1, ^PGEN)
+		^PGEN = 1
 
 		/* Set Power State to D3 */
-		Or (PMCR, 0x0003, PMCR)
-		Store (PMCR, ^TEMP)
+		PMCR |= 0x0003
+		^TEMP = PMCR
 
 		/* Enable 20K pull-down on CLK, CMD and DAT lines */
 		^^PCRO (PID_GPIOCOM3, 0x4c4, 0x00001000)
diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl
index 962d9ef879..d1441c4322 100644
--- a/src/soc/intel/skylake/acpi/systemagent.asl
+++ b/src/soc/intel/skylake/acpi/systemagent.asl
@@ -203,7 +203,7 @@ Method (_CRS, 0, Serialized)
 		Local0 = \_SB.PCI0.MCHC.TOM & (0x7ffff << 20)
 	}
 
-	Store (Local0, PMIN)
+	PMIN = Local0
 	PLEN = (PMAX - PMIN) + 1
 
 	/* Patch PM02 range based on Memory Size */
diff --git a/src/soc/intel/skylake/acpi/xhci.asl b/src/soc/intel/skylake/acpi/xhci.asl
index 978c7e3964..734539b762 100644
--- a/src/soc/intel/skylake/acpi/xhci.asl
+++ b/src/soc/intel/skylake/acpi/xhci.asl
@@ -117,37 +117,37 @@ Device (XHCI)
 
 	Method (_PS0, 0, Serialized)
 	{
-		If (!LEqual (^DVID, 0xFFFF)) {
-			If (!LOr (LEqual (^XMEM, 0xFFFF), LEqual (^XMEM, 0x0000))) {
+		If (^DVID != 0xFFFF) {
+			If (!((^XMEM == 0xFFFF) || (^XMEM == 0x0000))) {
 
 				/* Disable d3hot and SS link trunk clock gating */
-				Store(Zero, ^D3HE)
-				Store(Zero, ^STGE)
+				^D3HE = 0
+				^STGE = 0
 
 				/* If device is in D3, set back to D0 */
-				If (LEqual (^D0D3, 3)) {
-					Store (Zero, Local0)
-					Store (Local0, ^D0D3)
-					Store (^D0D3, Local0)
+				If (^D0D3 == 3) {
+					Local0 = 0
+					^D0D3 = Local0
+					Local0 = ^D0D3
 				}
 
 				/* Disable USB2 PHY SUS Well Power Gating */
-				Store (Zero, ^UPSW)
+				^UPSW = 0
 
 				/*
 				* Apply USB2 PHPY Power Gating workaround if needed.
 				*/
 				If (^^PMC.UWAB) {
 					/* Write to MTPMC to have PMC disable power gating */
-					Store (1, ^^PMC.MPMC)
+					^^PMC.MPMC = 1
 
 					/* Wait for PCH_PM_STS.MSG_FULL_STS to be 0 */
-					Store (10, Local0)
+					Local0 = 10
 					While (^^PMC.PMFS) {
-						If (LNot (Local0)) {
+						If (!Local0) {
 							Break
 						}
-						Decrement (Local0)
+						Local0--
 						Sleep (10)
 					}
 				}
@@ -157,33 +157,33 @@ Device (XHCI)
 
 	Method (_PS3, 0, Serialized)
 	{
-		If (!LEqual (^DVID, 0xFFFF)) {
-			If (!LOr (LEqual (^XMEM, 0xFFFF), LEqual (^XMEM, 0x0000))) {
+		If (^DVID != 0xFFFF) {
+			If (!((^XMEM == 0xFFFF) || (^XMEM == 0x0000))) {
 
 				/* Clear PME Status */
-				Store (1, ^PMES)
+				^PMES = 1
 
 				/* Enable PME */
-				Store (1, ^PMEE)
+				^PMEE= 1
 
 				/* If device is in D3, set back to D0 */
-				If (LEqual (^D0D3, 3)) {
-					Store (Zero, Local0)
-					Store (Local0, ^D0D3)
-					Store (^D0D3, Local0)
+				If (^D0D3 == 3) {
+					Local0 = 0
+					^D0D3 = Local0
+					Local0 = ^D0D3
 				}
 
 				/* Enable USB2 PHY SUS Well Power Gating in D0/D0i2/D0i3/D3 */
-				Store (3, ^UPSW)
+				^UPSW = 3
 
 				/* Enable d3hot and SS link trunk clock gating */
-				Store(One, ^D3HE)
-				Store(One, ^STGE)
+				^D3HE = 1
+				^STGE = 1
 
 				/* Now put device in D3 */
-				Store (3, Local0)
-				Store (Local0, ^D0D3)
-				Store (^D0D3, Local0)
+				Local0 = 3
+				^D0D3 = Local0
+				Local0 = ^D0D3
 
 				/*
 				* Apply USB2 PHPY Power Gating workaround if needed.
@@ -192,15 +192,15 @@ Device (XHCI)
 				*/
 				If (^^PMC.UWAB) {
 					/* Write to MTPMC to have PMC enable power gating */
-					Store (3, ^^PMC.MPMC)
+					^^PMC.MPMC = 3
 
 					/* Wait for PCH_PM_STS.MSG_FULL_STS to be 0 */
-					Store (10, Local0)
+					Local0 = 10
 					While (^^PMC.PMFS) {
-						If (LNot (Local0)) {
+						If (!Local0) {
 							Break
 						}
-						Decrement (Local0)
+						Local0--
 						Sleep (10)
 					}
 				}