diff options
| author | York Yang <york.yang@intel.com> | 2016-04-15 11:22:49 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-17 23:26:59 +0200 |
| commit | fbec6b160e5857c515790875a5e891bbbe025417 (patch) | |
| tree | 41f6ab491c93482a0f31176f8d8c2f1ba971f723 | |
| parent | bfe5726571761afa10edbd245443189e355eb250 (diff) | |
MAINTAINERS: Add Intel Broadwell-DE SOC and Camelback Mountain CRB
Add Intel Broadwell-DE SOC and Camelback Mountain CRB to the list
Change-Id: I3f0c3ae8b38ecf3c3676fe497ade8b74ba94485d
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: https://review.coreboot.org/14382
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | MAINTAINERS | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 7d5b731a95..6e5fa6ac1a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -150,18 +150,6 @@ M: Stefan Reinauer <stefan.reinauer@coreboot.org> S: Supported F: src/mainboard/google/panther/ -INTEL FSP IVYBRIDGE/PANTHERPOINT/CAVECREEK & CRBs -M: York Yang <york.yang@intel.com> -S: Supported -F: src/cpu/intel/fsp_model_206ax/ -F: src/northbridge/intel/fsp_sandybridge/ -F: src/southbridge/intel/fsp_bd82x6x/ -F: src/southbridge/intel/fsp_i89xx/ -F: src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x -F: src/vendorcode/intel/fsp1_0/ivybridge_i89xx -F: src/mainboard/intel/cougar_canyon2/ -F: src/mainboard/intel/stargo2/ - INTEL MINNOWBOARD MAX MAINBOARD M: Huang Jin <huang.jin@intel.com> M: York Yang <york.yang@intel.com> @@ -179,6 +167,25 @@ F: src/vendorcode/intel/fsp1_0/baytrail/ F: src/mainboard/intel/bakersport_fsp/ F: src/mainboard/intel/bayleybay_fsp/ +INTEL FSP BROADWELL-DE SOC & CRB +M: York Yang <york.yang@intel.com> +S: Supported +F: src/soc/intel/fsp_broadwell_de/ +F: src/vendorcode/intel/fsp1_0/broadwell_de/ +F: src/mainboard/intel/camelbackmountain_fsp/ + +INTEL FSP IVYBRIDGE/PANTHERPOINT/CAVECREEK & CRBs +M: York Yang <york.yang@intel.com> +S: Supported +F: src/cpu/intel/fsp_model_206ax/ +F: src/northbridge/intel/fsp_sandybridge/ +F: src/southbridge/intel/fsp_bd82x6x/ +F: src/southbridge/intel/fsp_i89xx/ +F: src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x +F: src/vendorcode/intel/fsp1_0/ivybridge_i89xx +F: src/mainboard/intel/cougar_canyon2/ +F: src/mainboard/intel/stargo2/ + FSP 1.0 RANGELEY & CRB M: David Guckian <david.guckian@intel.com> M: Fei Wang <fei.z.wang@intel.com> |