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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2021-04-06 12:53:41 +0800
committerMartin Roth <martinroth@google.com>2021-04-07 15:16:09 +0000
commitf7c7d7c25d4fa5be42a04ee31a052d7debf630b9 (patch)
tree76000135865af7ff89300a76d37c18c292514945
parentc979dd1e00668b3823ed6a1670f2da205faac472 (diff)
mb/google/mancomb: Add eSPI GPIO back to init table
GPIOs should be configured in ramstage even if they are configured in an earlier stage. BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I07d5c46d6ea6dc2bc9ab265d0c01772d653884cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/52123 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
-rw-r--r--src/mainboard/google/mancomb/variants/baseboard/gpio.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/google/mancomb/variants/baseboard/gpio.c b/src/mainboard/google/mancomb/variants/baseboard/gpio.c
index 1eb1b8064a..29fa8660db 100644
--- a/src/mainboard/google/mancomb/variants/baseboard/gpio.c
+++ b/src/mainboard/google/mancomb/variants/baseboard/gpio.c
@@ -108,7 +108,14 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* CLK_REQ0_L */
PAD_NF(GPIO_92, CLK_REQ0_L, PULL_NONE),
/* GPIO_93 - GPIO_103: Not available */
- /* GPIO_104 - GPIO_108: eSPI configured in early stage */
+ /* ESPI1_DATA0 */
+ PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE),
+ /* ESPI1_DATA1 */
+ PAD_NF(GPIO_105, SPI2_DI_ESPI2_D1, PULL_NONE),
+ /* ESPI1_DATA2 */
+ PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE),
+ /* ESPI1_DATA3 */
+ PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
/* EGPIO109 */
PAD_NC(GPIO_109),
/* GPIO_110 - GPIO_112: Not available */