diff options
| author | Rudolf Marek <r.marek@assembler.cz> | 2010-11-30 20:18:53 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2010-11-30 20:18:53 +0000 |
| commit | f41752c1924e0cbd8bbe2f45dc5d663b7efef0a1 (patch) | |
| tree | b78d5e4c0c48cbb9cd7d9767f5efe2b400c0929d | |
| parent | 6b8c721e2063b94d66d5dd7540c2b8a4f33d51cc (diff) | |
Fix the SPD to channel mapping. Please note that there is something wrong with UMA.
Single channel (in slot DDR1 and DDR3) produces strange artefacts on screen (and hang)
Dual Channel (in DDR1 and DDR2 aka blue slot) - works nice
All slots populated - same case as Single channel - must be something wrong with UMA.
Tested with 2x 512MB CAS 2.5 DDR400
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/mainboard/asrock/939a785gmh/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index 6ab8c83156..2dd94945af 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -121,7 +121,7 @@ static void sio_init(void) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - static const u16 spd_addr[] = { DIMM0, 0, 0, 0, DIMM1, 0, 0, 0, }; + static const u16 spd_addr[] = { DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, }; int needs_reset = 0; u32 bsp_apicid = 0; msr_t msr; |