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authorKapil Porwal <kapilporwal@google.com>2023-01-16 16:41:49 +0000
committerSubrata Banik <subratabanik@google.com>2023-01-19 09:48:44 +0000
commite988cc20b654560211db8958d4e57ea807a249c4 (patch)
treea74e0661b02384075887b9fb5fdf86dc5d3312c1
parentb10a4bf002a6cc6154d2eaeabcca1068aeea039f (diff)
intel/meteorlake: remove skip_mbp_hob SOC chip config
Introduce at new config option CONFIG_FSP_PUBLISH_MBP_HOB to control the creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. This new option is hooked with `SkipMbpHob` UPD and is always disabled for ChromeOS platforms. This made skip_mbp_hob SOC chip config variable redundant which is also removed as part of this change. BUG=none TEST=Build and boot to Google/Rex. Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: Iaba1ea29a92a63d2b287e1ccdea1a81ec07b9971 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
-rw-r--r--src/mainboard/google/rex/variants/rex0/overridetree.cb2
-rw-r--r--src/soc/intel/meteorlake/Kconfig8
-rw-r--r--src/soc/intel/meteorlake/chip.h6
-rw-r--r--src/soc/intel/meteorlake/romstage/fsp_params.c2
4 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb
index 41da81926a..f3952a2f91 100644
--- a/src/mainboard/google/rex/variants/rex0/overridetree.cb
+++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb
@@ -70,8 +70,6 @@ chip soc/intel/meteorlake
[PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
- register "skip_mbp_hob" = "1"
-
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 2ae9ace7ba..8b3a553007 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -371,4 +371,12 @@ config MTL_USE_COREBOOT_MP_INIT
endchoice
+config FSP_PUBLISH_MBP_HOB
+ bool
+ default n if CHROMEOS
+ default y
+ help
+ This is to control creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP.
+ Disabling it for the platforms, which do not use MBP HOB, can improve the boot time.
+
endif
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index 080f05738a..97b3c5b363 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -352,12 +352,6 @@ struct soc_intel_meteorlake_config {
* Set this to 1 in order to disable Package C-state demotion.
*/
bool disable_package_c_state_demotion;
-
- /*
- * Enable or Disable Skipping MBP HOB.
- * Default is set to 0 and set to 1 to skip the MBP HOB.
- */
- bool skip_mbp_hob;
};
typedef struct soc_intel_meteorlake_config config_t;
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index add927dfa6..1c4f02e664 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -187,7 +187,7 @@ static void fill_fspm_misc_params(FSP_M_CONFIG *m_cfg,
m_cfg->GpioOverride = 0x1;
/* Skip MBP HOB */
- m_cfg->SkipMbpHob = config->skip_mbp_hob;
+ m_cfg->SkipMbpHob = !CONFIG(FSP_PUBLISH_MBP_HOB);
}
static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg,