diff options
| author | Sindhoor Tilak <sindhoor@sin9yt.net> | 2020-06-19 20:46:40 -0400 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2020-07-04 11:36:04 +0000 |
| commit | e5f25cee1cf84458a15da62375e14abeb423945c (patch) | |
| tree | 6f7f4a7475789aa06f001f28eb776a751ecce113 | |
| parent | ad0ccb336d0184c7e4bd8157483bc80a5dfd5ab4 (diff) | |
post_code: reorganize order of postcode defines
Currently, the certain postcode values aren't in increasing
order of values.
The change, just reorganzies the defines in increasing order
of the values
Signed-off-by: Sindhoor Tilak <sindhoor@sin9yt.net>
Change-Id: Id5f0ddc4593f689829ab9a7fdeebd5f66939bf79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
| -rw-r--r-- | src/include/console/post_codes.h | 63 |
1 files changed, 31 insertions, 32 deletions
diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h index 0c6655cec8..ee74dcb23e 100644 --- a/src/include/console/post_codes.h +++ b/src/include/console/post_codes.h @@ -59,7 +59,6 @@ */ #define POST_RAMSTAGE_IS_PREPARED 0x12 - /** * \brief Entry into c_start * @@ -84,21 +83,6 @@ #define POST_MEM_PREINIT_PREP_END 0x36 /** - * \brief Pre call to RAM stage main() - * - * POSTed right before RAM stage main() is called from c_start.S - */ -#define POST_PRE_HARDWAREMAIN 0x79 - -/** - * \brief Entry into coreboot in RAM stage main() - * - * This is the first call in hardwaremain.c. If this code is POSTed, then - * ramstage has successfully loaded and started executing. - */ -#define POST_ENTRY_RAMSTAGE 0x80 - -/** * \brief Console is initialized * * The console is initialized and is ready for usage @@ -191,6 +175,21 @@ #define POST_BS_WRITE_TABLES 0x79 /** + * \brief Pre call to RAM stage main() + * + * POSTed right before RAM stage main() is called from c_start.S + */ +#define POST_PRE_HARDWAREMAIN 0x79 + +/** + * \brief Entry into coreboot in RAM stage main() + * + * This is the first call in hardwaremain.c. If this code is POSTed, then + * ramstage has successfully loaded and started executing. + */ +#define POST_ENTRY_RAMSTAGE 0x80 + +/** * \brief Load Payload * * Boot State Machine: bs_payload_load() @@ -303,22 +302,6 @@ #define POST_FSP_MULTI_PHASE_SI_INIT_EXIT 0xa1 /** - * \brief Entry into elf boot - * - * This POST code is called right before invoking jmp_to_elf_entry() - * jmp_to_elf_entry() invokes the payload, and should never return - */ -#define POST_ENTER_ELF_BOOT 0xf8 - -/** - * \brief Jumping to payload - * - * Called right before jumping to a payload. If the boot sequence stops with - * this code, chances are the payload freezes. - */ -#define POST_JUMPING_TO_PAYLOAD 0xf3 - -/** * \brief Invalid or corrupt ROM * * Set if firmware failed to find or validate a resource that is stored in ROM. @@ -387,6 +370,22 @@ #define POST_RESUME_FAILURE 0xef /** + * \brief Jumping to payload + * + * Called right before jumping to a payload. If the boot sequence stops with + * this code, chances are the payload freezes. + */ +#define POST_JUMPING_TO_PAYLOAD 0xf3 + +/** + * \brief Entry into elf boot + * + * This POST code is called right before invoking jmp_to_elf_entry() + * jmp_to_elf_entry() invokes the payload, and should never return + */ +#define POST_ENTER_ELF_BOOT 0xf8 + +/** * \brief Final code before OS resumes * * Called right before jumping to the OS resume vector. |