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authorJulian Schroeder <julian.schroeder@amd.com>2021-03-04 15:50:41 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-03-25 19:16:28 +0000
commite286ef9f4181413e7c664de8557a254254eb404f (patch)
tree25d6843896b3bc2747c802018cb69338fb0c670a
parenta16a09f8693fbbab01714e001d57f1fcc53a1b42 (diff)
mb/google/zork/variants/baseboard: USB2 HS phy settings
Set default USB2 HS disconnect threshold to maximum to avoid false disconnects that eventually lock up the xHCI controller BUG=b:174538960 TEST=suspend_stress_test -c 50 on vilboz and morphius. Sample set of USB2 HS devices connect and disconnect successfully Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com> Change-Id: Ic921d850a0bdd717a2a7e50e9e6f65e39e0607bf Reviewed-on: https://review.coreboot.org/c/coreboot/+/51265 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb12
-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb12
2 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
index d4120731c1..3f4c4047e9 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
@@ -65,7 +65,7 @@ chip soc/amd/picasso
# Controller0 Port0 Default
register "usb_2_port_tune_params[0]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -78,7 +78,7 @@ chip soc/amd/picasso
# Controller0 Port1 Default
register "usb_2_port_tune_params[1]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -91,7 +91,7 @@ chip soc/amd/picasso
# Controller0 Port2 Default
register "usb_2_port_tune_params[2]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -104,7 +104,7 @@ chip soc/amd/picasso
# Controller0 Port3 Default
register "usb_2_port_tune_params[3]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -117,7 +117,7 @@ chip soc/amd/picasso
# Controller1 Port0 Default
register "usb_2_port_tune_params[4]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
@@ -130,7 +130,7 @@ chip soc/amd/picasso
# Controller1 Port1 Default
register "usb_2_port_tune_params[5]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
index 0e0eb05c0a..3270b6f954 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
@@ -58,7 +58,7 @@ chip soc/amd/picasso
# Controller0 Port0 Default
register "usb_2_port_tune_params[0]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -71,7 +71,7 @@ chip soc/amd/picasso
# Controller0 Port1 Default
register "usb_2_port_tune_params[1]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -84,7 +84,7 @@ chip soc/amd/picasso
# Controller0 Port2 Default
register "usb_2_port_tune_params[2]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -97,7 +97,7 @@ chip soc/amd/picasso
# Controller0 Port3 Default
register "usb_2_port_tune_params[3]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -110,7 +110,7 @@ chip soc/amd/picasso
# Controller1 Port0 Default
register "usb_2_port_tune_params[4]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,
@@ -123,7 +123,7 @@ chip soc/amd/picasso
# Controller1 Port1 Default
register "usb_2_port_tune_params[5]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x02,