diff options
author | Bora Guvendik <bora.guvendik@intel.com> | 2023-12-13 11:14:01 -0800 |
---|---|---|
committer | Nick Vaccaro <nvaccaro@google.com> | 2023-12-15 17:36:41 +0000 |
commit | d9c347fb8bf5815567ca5fe94f1cf2d0b4cd3c87 (patch) | |
tree | 1cffb60f905b23216bb921f78f40014ac1a346df | |
parent | 0b7388f0504b9ac849857681ee14c5ff4b2cc73c (diff) |
mb/google/brya: Enable FSP UPD LpDdrDqDqsReTraining
FSP default value for LpDdrDqDqsReTraining is 1. For boards
that didn't set LpDdrDqDqsReTraining to any value, 0 was being
assigned and it caused black screen issue.
BUG=b:302465393
TEST=Boot to OS with debug FSP, check LpDdrDqDqsReTraining = 1
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I301a6e43f2944ffbc63431393378ab8b23450032
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
19 files changed, 44 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/agah/memory.c b/src/mainboard/google/brya/variants/agah/memory.c index ef5e69a064..b36e78f0e3 100644 --- a/src/mainboard/google/brya/variants/agah/memory.c +++ b/src/mainboard/google/brya/variants/agah/memory.c @@ -61,6 +61,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; diff --git a/src/mainboard/google/brya/variants/aurash/memory.c b/src/mainboard/google/brya/variants/aurash/memory.c index ad33e9c9c7..3ac4bb8c69 100644 --- a/src/mainboard/google/brya/variants/aurash/memory.c +++ b/src/mainboard/google/brya/variants/aurash/memory.c @@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = { .targets = {50, 20, 25, 25, 25}, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_MOBILE, diff --git a/src/mainboard/google/brya/variants/banshee/memory.c b/src/mainboard/google/brya/variants/banshee/memory.c index 7371f57a70..125e90902e 100644 --- a/src/mainboard/google/brya/variants/banshee/memory.c +++ b/src/mainboard/google/brya/variants/banshee/memory.c @@ -14,6 +14,8 @@ static const struct mb_cfg ddr4_mem_config = { .targets = {50, 20, 25, 25, 25}, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_MOBILE, diff --git a/src/mainboard/google/brya/variants/baseboard/brask/memory.c b/src/mainboard/google/brya/variants/baseboard/brask/memory.c index 447328b2ca..b77a7125e7 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/memory.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/memory.c @@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = { .targets = {50, 20, 25, 25, 25}, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_MOBILE, diff --git a/src/mainboard/google/brya/variants/baseboard/brya/memory.c b/src/mainboard/google/brya/variants/baseboard/brya/memory.c index bcad9b4be9..e074fea56b 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/memory.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/memory.c @@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; diff --git a/src/mainboard/google/brya/variants/baseboard/hades/memory.c b/src/mainboard/google/brya/variants/baseboard/hades/memory.c index 29e3084051..742ce7fe3a 100644 --- a/src/mainboard/google/brya/variants/baseboard/hades/memory.c +++ b/src/mainboard/google/brya/variants/baseboard/hades/memory.c @@ -16,6 +16,8 @@ static const struct mb_cfg ddr5_mem_config = { .targets = {50, 20, 25, 25, 25}, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_MOBILE, diff --git a/src/mainboard/google/brya/variants/constitution/memory.c b/src/mainboard/google/brya/variants/constitution/memory.c index b68ec2125a..c399950177 100644 --- a/src/mainboard/google/brya/variants/constitution/memory.c +++ b/src/mainboard/google/brya/variants/constitution/memory.c @@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 1, .dqs1 = 0 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; diff --git a/src/mainboard/google/brya/variants/crota/memory.c b/src/mainboard/google/brya/variants/crota/memory.c index 7c6fc24307..2573229fe5 100644 --- a/src/mainboard/google/brya/variants/crota/memory.c +++ b/src/mainboard/google/brya/variants/crota/memory.c @@ -67,6 +67,8 @@ static const struct mb_cfg baseboard_memcfg = { .ccc_config = 0xff, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ }; diff --git a/src/mainboard/google/brya/variants/gaelin/memory.c b/src/mainboard/google/brya/variants/gaelin/memory.c index 98b655c100..9799ae089c 100644 --- a/src/mainboard/google/brya/variants/gaelin/memory.c +++ b/src/mainboard/google/brya/variants/gaelin/memory.c @@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = { .targets = {50, 20, 25, 25, 25}, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_MOBILE, diff --git a/src/mainboard/google/brya/variants/kano/memory.c b/src/mainboard/google/brya/variants/kano/memory.c index c81f8cc21f..31837086f8 100644 --- a/src/mainboard/google/brya/variants/kano/memory.c +++ b/src/mainboard/google/brya/variants/kano/memory.c @@ -63,6 +63,8 @@ static const struct mb_cfg kano_memcfg = { .ddr7 = { .dqs0 = 1, .dqs1 = 0 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; @@ -125,6 +127,8 @@ static const struct mb_cfg hynix_memcfg = { .ddr7 = { .dqs0 = 1, .dqs1 = 0 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ .cs_pi_start_high_in_ect = 1, diff --git a/src/mainboard/google/brya/variants/kinox/memory.c b/src/mainboard/google/brya/variants/kinox/memory.c index 01a997e78f..e9aaea1925 100644 --- a/src/mainboard/google/brya/variants/kinox/memory.c +++ b/src/mainboard/google/brya/variants/kinox/memory.c @@ -17,6 +17,8 @@ static const struct mb_cfg ddr4_mem_config = { .targets = {50, 20, 25, 25, 25}, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_MOBILE, diff --git a/src/mainboard/google/brya/variants/marasov/memory.c b/src/mainboard/google/brya/variants/marasov/memory.c index 764a4adc88..79a1296445 100644 --- a/src/mainboard/google/brya/variants/marasov/memory.c +++ b/src/mainboard/google/brya/variants/marasov/memory.c @@ -65,6 +65,8 @@ static const struct mb_cfg baseboard_memcfg = { .ccc_config = 0xff, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_ULT_ULX, diff --git a/src/mainboard/google/brya/variants/moli/memory.c b/src/mainboard/google/brya/variants/moli/memory.c index ad33e9c9c7..3ac4bb8c69 100644 --- a/src/mainboard/google/brya/variants/moli/memory.c +++ b/src/mainboard/google/brya/variants/moli/memory.c @@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = { .targets = {50, 20, 25, 25, 25}, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_MOBILE, diff --git a/src/mainboard/google/brya/variants/omnigul/memory.c b/src/mainboard/google/brya/variants/omnigul/memory.c index f72b729e90..69db23d2ab 100644 --- a/src/mainboard/google/brya/variants/omnigul/memory.c +++ b/src/mainboard/google/brya/variants/omnigul/memory.c @@ -67,6 +67,8 @@ static const struct mb_cfg baseboard_memcfg = { .ect = 1, /* Early Command Training */ + .LpDdrDqDqsReTraining = 1, + .UserBd = BOARD_TYPE_ULT_ULX, }; diff --git a/src/mainboard/google/brya/variants/osiris/memory.c b/src/mainboard/google/brya/variants/osiris/memory.c index 4d16379174..d18cad3087 100644 --- a/src/mainboard/google/brya/variants/osiris/memory.c +++ b/src/mainboard/google/brya/variants/osiris/memory.c @@ -63,6 +63,8 @@ static const struct mb_cfg osiris_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; @@ -125,6 +127,8 @@ static const struct mb_cfg hynix_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ .cs_pi_start_high_in_ect = 1, diff --git a/src/mainboard/google/brya/variants/taeko/memory.c b/src/mainboard/google/brya/variants/taeko/memory.c index cecfdc6222..a35708d4b6 100644 --- a/src/mainboard/google/brya/variants/taeko/memory.c +++ b/src/mainboard/google/brya/variants/taeko/memory.c @@ -66,6 +66,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; @@ -128,6 +130,8 @@ static const struct mb_cfg hynix_memconfig = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ .cs_pi_start_high_in_ect = 1, diff --git a/src/mainboard/google/brya/variants/taeko4es/memory.c b/src/mainboard/google/brya/variants/taeko4es/memory.c index e9e8533931..fdf06b1f58 100644 --- a/src/mainboard/google/brya/variants/taeko4es/memory.c +++ b/src/mainboard/google/brya/variants/taeko4es/memory.c @@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; diff --git a/src/mainboard/google/brya/variants/taniks/memory.c b/src/mainboard/google/brya/variants/taniks/memory.c index e7cba57c30..1d096af3f3 100644 --- a/src/mainboard/google/brya/variants/taniks/memory.c +++ b/src/mainboard/google/brya/variants/taniks/memory.c @@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Enable Early Command Training */ }; diff --git a/src/mainboard/google/brya/variants/vell/memory.c b/src/mainboard/google/brya/variants/vell/memory.c index faa6eecde0..341634e2fa 100644 --- a/src/mainboard/google/brya/variants/vell/memory.c +++ b/src/mainboard/google/brya/variants/vell/memory.c @@ -58,6 +58,8 @@ static const struct mb_cfg baseboard_memcfg = { .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, }, + .LpDdrDqDqsReTraining = 1, + .ect = true, /* Early Command Training */ .UserBd = BOARD_TYPE_ULT_ULX_T4, |