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authorSumeet R Pawnikar <sumeet.r.pawnikar@intel.com>2020-05-26 19:59:45 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-06-22 12:18:27 +0000
commitd8b4ea992b0c1481f5aed0adfee9b8f28273f5db (patch)
tree652a67a8953ec2dd53919ed1153321b5c0f4bc6a
parent5a082825aa51b706adf553b38c225aa780ae8686 (diff)
soc/intel/jasperlake: add processor power limits control support
Add processor power limits control support to configure values for jasperlake soc based platforms. BRANCH=None BUG=None TEST=Built for dedede system Change-Id: Ib5502b225c1158c1f0729ce799ed0b8101f0233f Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41777 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/soc/intel/jasperlake/systemagent.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/systemagent.c b/src/soc/intel/jasperlake/systemagent.c
index 072db796a8..080446c507 100644
--- a/src/soc/intel/jasperlake/systemagent.c
+++ b/src/soc/intel/jasperlake/systemagent.c
@@ -1,10 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h>
+#include <delay.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <intelblocks/systemagent.h>
+#include <intelblocks/power_limit.h>
#include <soc/iomap.h>
+#include <soc/soc_chip.h>
#include <soc/systemagent.h>
/*
@@ -43,9 +46,17 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
*/
void soc_systemagent_init(struct device *dev)
{
+ struct soc_power_limits_config *soc_config;
+ config_t *config;
+
/* Enable Power Aware Interrupt Routing */
enable_power_aware_intr();
/* Enable BIOS Reset CPL */
enable_bios_reset_cpl();
+
+ mdelay(1);
+ config = config_of_soc();
+ soc_config = &config->power_limits_config;
+ set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
}