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authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-01-05 18:05:11 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-08-16 18:04:07 +0000
commitd84ace50e35d60fe29e6718c33dd7e1e5ea937bd (patch)
treee2efb00e873e9d373c4b94b493698d5f7fa9441d
parent7f4f99d5a5ef70a6bea232968efd80d5f6243301 (diff)
mb/google: Re-arrange mainboard_smi_sleep()
Change the order of enabling EC and GPE wake sources, so it comes more obvious we can use existing chromeec handlers without changes. Change-Id: I5a10afa2b816dc8c01074be68a63114ee027c1e2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74604 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/cyan/smihandler.c15
-rw-r--r--src/mainboard/google/rambi/smihandler.c9
-rw-r--r--src/mainboard/intel/strago/smihandler.c9
3 files changed, 24 insertions, 9 deletions
diff --git a/src/mainboard/google/cyan/smihandler.c b/src/mainboard/google/cyan/smihandler.c
index efd6efe5d0..4dd2e0e804 100644
--- a/src/mainboard/google/cyan/smihandler.c
+++ b/src/mainboard/google/cyan/smihandler.c
@@ -37,15 +37,10 @@ void mainboard_smi_sleep(uint8_t slp_typ)
switch (slp_typ) {
case ACPI_S3:
- /* Enable wake events */
- google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
/* Enable wake pin in GPE block. */
enable_gpe(WAKE_GPIO_EN);
break;
case ACPI_S5:
- /* Enable wake events */
- google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
-
/* Disabling wake from SUS_GPIO1 (TOUCH INT) and
* SUS_GPIO7 (TRACKPAD INT) in North bank as they are not
* valid S5 wake sources
@@ -54,7 +49,17 @@ void mainboard_smi_sleep(uint8_t slp_typ)
GPIO_WAKE_MASK_REG0);
mask = ~(GPIO_SUS1_WAKE_MASK | GPIO_SUS7_WAKE_MASK);
write32(addr, read32(addr) & mask);
+ break;
+ }
+ switch (slp_typ) {
+ case ACPI_S3:
+ /* Enable wake events */
+ google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
+ break;
+ case ACPI_S5:
+ /* Enable wake events */
+ google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
break;
}
diff --git a/src/mainboard/google/rambi/smihandler.c b/src/mainboard/google/rambi/smihandler.c
index 5d3329fbf5..3c0743a4f4 100644
--- a/src/mainboard/google/rambi/smihandler.c
+++ b/src/mainboard/google/rambi/smihandler.c
@@ -28,11 +28,16 @@ void mainboard_smi_sleep(uint8_t slp_typ)
switch (slp_typ) {
case ACPI_S3:
- /* Enable wake events */
- google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
/* Enable wake pin in GPE block. */
enable_gpe(WAKE_GPIO_EN);
break;
+ }
+
+ switch (slp_typ) {
+ case ACPI_S3:
+ /* Enable wake events */
+ google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
+ break;
case ACPI_S5:
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
diff --git a/src/mainboard/intel/strago/smihandler.c b/src/mainboard/intel/strago/smihandler.c
index 6d29df8437..40a85448a8 100644
--- a/src/mainboard/intel/strago/smihandler.c
+++ b/src/mainboard/intel/strago/smihandler.c
@@ -33,11 +33,16 @@ void mainboard_smi_sleep(uint8_t slp_typ)
switch (slp_typ) {
case ACPI_S3:
- /* Enable wake events */
- google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
/* Enable wake pin in GPE block. */
enable_gpe(WAKE_GPIO_EN);
break;
+ }
+
+ switch (slp_typ) {
+ case ACPI_S3:
+ /* Enable wake events */
+ google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
+ break;
case ACPI_S5:
/* Enable wake events */
google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);