diff options
| author | Kevin Chiu <kevin.chiu.17802@gmail.com> | 2022-02-15 16:09:40 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-01 11:57:58 +0000 |
| commit | d736fd4ea7a9060450d10dac7c4ea9b312b8c1e9 (patch) | |
| tree | 8844547983700e9a1c0e13146b07d0605853035c | |
| parent | a4af1b58a51cd84fbce6de3ce1b13ab4cc994f36 (diff) | |
mb/google/guybrush/var/nipperkin: update thermal setting
Enable STT and decrease sustained_power_limit_mW to 12W
BUG=b:219616787
BRANCH=guybrush
TEST=emerge-guybrush coreboot
update the thermal setting value by measurement and
pass the thermal performance test
Signed-off-by: Kevin Chiu <kevin.chiu.17802@gmail.com>
Change-Id: I5b7b0156fb4a1e2be8528a5787ed82acff93f06c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
| -rw-r--r-- | src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb index b49c8a6ed7..776edc808e 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb @@ -204,7 +204,7 @@ chip soc/amd/cezanne register "fast_ppt_limit_mW" = "30000" register "slow_ppt_time_constant_s" = "5" register "stapm_time_constant_s" = "275" - register "sustained_power_limit_mW" = "15000" + register "sustained_power_limit_mW" = "12000" register "thermctl_limit_degreeC" = "100" register "telemetry_vddcrvddfull_scale_current_mA" = "73331" #mA @@ -212,6 +212,28 @@ chip soc/amd/cezanne register "telemetry_vddcrsocfull_scale_current_mA" = "31955" #mA register "telemetry_vddcrsocoffset" = "852" + # Enable STT support + register "stt_control" = "1" + register "stt_pcb_sensor_count" = "2" + register "stt_min_limit" = "12000" + register "stt_m1" = "0x466" + register "stt_m2" = "0xFF3B" + register "stt_m3" = "0" + register "stt_m4" = "0" + register "stt_m5" = "0" + register "stt_m6" = "0" + register "stt_c_apu" = "0x14DA" + register "stt_c_gpu" = "0" + register "stt_c_hs2" = "0" + register "stt_alpha_apu" = "0x199A" + register "stt_alpha_gpu" = "0" + register "stt_alpha_hs2" = "0" + register "stt_skin_temp_apu" = "0x2E00" + register "stt_skin_temp_gpu" = "0" + register "stt_skin_temp_hs2" = "0" + register "stt_error_coeff" = "0x21" + register "stt_error_rate_coefficient" = "0x2666" + # I2C Config #+-------------------+---------------------------+ #| Field | Value | |