diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-10-08 10:06:02 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-26 20:56:16 +0000 |
| commit | d70c560a19f63f0f89fe5b14d669e8d5fa16112e (patch) | |
| tree | fd03a7085c32aff08ba29802d4583c4d1721f3a3 | |
| parent | 53dd00a6b0d9e0779302db621d777e84ea40cba3 (diff) | |
mb/msi/ms7721: Convert to ASL 2.0 syntax
Generated build/dsdt.dsl files are same.
Change-Id: Iaf26af76935dc8cd9642f047e833f0e8b14e6931
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46209
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/msi/ms7721/acpi/sleep.asl | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/msi/ms7721/acpi/sleep.asl b/src/mainboard/msi/ms7721/acpi/sleep.asl index e08accda50..07f6419b64 100644 --- a/src/mainboard/msi/ms7721/acpi/sleep.asl +++ b/src/mainboard/msi/ms7721/acpi/sleep.asl @@ -26,20 +26,20 @@ Method(\_PTS, 1) { /* DBGO("\n") */ /* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/ /* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(\_SB.SBRI, 0x13)) { - * Store(0,\_SB.PWDE) + /*if (\_SB.SBRI <= 0x13) { + * \_SB.PWDE = 0 *} */ /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 - Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(\_PTS) */ /* |